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PHY RTL Design Engineer

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Join Apple's wireless silicon development team, focusing on highly energy-efficient design and new technologies for wireless communication SoCs. This role involves developing signal processing intensive designs, including writing specifications, defining microarchitecture based on system models, and architecting for area and power efficiency. You will work with algorithm and software teams to ensure performance and power efficiency, perform RTL logic design, and support design verification and backend activities. The position also includes involvement in pre and post-silicon bring-up processes.

Come join Apple’s growing wireless silicon development team. Our wireless SOC organization is responsible for all aspects of wireless silicon development. With a particular emphasis on highly energy-efficient design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture, and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering.Develop signal processing intensive design for wireless communication SoCs, including: Writing specifications, other documents, and defining Microarchitecture based on MATLAB/C system model. Architecting area and power. Efficient low latency designs with scalabilities and flexibilities. Work with algorithm and software team to ensure performance and power efficiency. Power and Area efficient RTL logic design, and DV support. Running tools to ensure lint and CDC/RDC clean design. Synthesis and timing constraints. Experience in design of signal processing Wireless protocols.<ul class="list-disc list-inside my-5 pl-5 space-y-2 text-gray-700"><li class="leading-relaxed">RTL coding and verification for PHY modem development.</li><li class="leading-relaxed">Support banckend activities by reviewing the reports and appropriate adjustment of the design.</li><li class="leading-relaxed">Involve in the pre and post silicon bringup process.</li></ul><ul class="list-disc list-inside my-5 pl-5 space-y-2 text-gray-700"><li class="leading-relaxed">Bachelors degree and 3+ years of relevant industry experience.</li><li class="leading-relaxed">Understanding of DSP fundamentals.</li><li class="leading-relaxed">Digital Communications knowledge.</li><li class="leading-relaxed">Proficiency in RTL Design.</li></ul><ul class="list-disc list-inside my-5 pl-5 space-y-2 text-gray-700"><li class="leading-relaxed">Familiarity with UVM DV environment and AI based efficiency improvement flows.</li><li class="leading-relaxed">Strong fixed-point knowledge and extensive experience with bit-true cycle-accurate verifications.</li><li class="leading-relaxed">Understanding of Decoders - Viterbi, LDPC, Polar.</li><li class="leading-relaxed">Understanding of Filter design, multi-radix implementation, and compromises.</li><li class="leading-relaxed">Knowledgeable in modern design techniques and energy-efficient/low power logic design, and power analysis.</li><li class="leading-relaxed">Familiarity with power estimation (vector-less and vector-based), modeling, profiling, and post-silicon power correlation.</li><li class="leading-relaxed">Solid understanding of wireless standards, such as IEEE 802.11, 802.15, Bluetooth or 3GPP is a plus.</li><li class="leading-relaxed">Background in computer architecture.</li><li class="leading-relaxed">Bus fabric, especially APB/AHB/AXI.</li><li class="leading-relaxed">Power management with multiple power domains.</li><li class="leading-relaxed">Ability to work well in a team and be productive under ambitious schedules.</li><li class="leading-relaxed">Should exhibit excellent interpersonal skills and be self-motivated and well-organized.</li><li class="leading-relaxed">Experience with FPGA and/or emulation platform desired.</li><li class="leading-relaxed">Excellent communication skills – both written, and oral.</li></ul>At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $147,400 and $272,100, and your base pay will depend on your skills, qualifications, experience, and location.Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. <a href="https://www.apple.com/careers/us/benefits.html" target="_blank" rel="noopener noreferrer" class="text-blue-600 hover:text-blue-800 hover:underline transition-colors duration-200">Learn more about Apple Benefits.</a>Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. <a href="https://www.eeoc.gov/sites/default/files/2023-06/22-088EEOCKnowYourRights6.12ScreenRdr.pdf" target="_blank" rel="noopener noreferrer" class="text-blue-600 hover:text-blue-800 hover:underline transition-colors duration-200">Learn more about your EEO rights as an applicant</a>.

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PHY RTL Design Engineer

PHY RTL Design Engineer

Systems Architect

Timing & Synthesis Engineer

Apple Silicon Trace Tools Engineer

Senior Business Intelligence / Data Visualization Engineer

PHY RTL Design Engineer

AIML - Staff ML Infrastructure Engineer, ML Platform & Technology - ML Compute

Materials Engineering Program Manager, NAND Systems

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