Cyient

Senior Physical Design Engineer

Seeking a skilled Senior Physical Design Engineer with 6+ years of experience in Netlist2GDSII Implementation, including floor planning, power grid design, placement, CTS, routing, STA, and physical verification. Expertise in 16nm and lower technology nodes, Cadence & Synopsys PnR suites, and automation with Tcl/Tk/Perl is required.

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 Physical Design Lead / Sr.Staff EngineerSkills required: <ul><li> Job Title: Physical Design Lead (6 to 15 years</li></ul>
 ) Job Descriptio n: In-depth knowledge and hands-on experience on Netlist2GDSII Implementation i.e. Floor planning, Power Grid Design, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical Verification, Chip finishing. Should have experience on Physical Design Methodologies and sub-micron technology of 16nm and lower technology nod <ul><li>es. Must have hands-on experience on PnR Suite from Cadence &amp; Synopsys (Innovus &amp; </li><li>ICC2)Experience in Static Timing Analysis (PrimeTime - SI), EM/IR-Drop analysis (PT-PX, Redhawk), Physical Verification (Cal</li><li>ibre)Understanding the practical application of methodologies and Physical Design Tools, Flow Automation, and Improve</li><li>mentsExperience in SOC integration, Low Power and High-Speed Design and Advanced Physical Verification Techn</li><li>iquesExcellent Customer interaction, Communication, Teamwork skills and managing a team o</li><li>f 10+Should have experience in handling &gt;5M instance count, 1.5GHz frequency de</li><li>signsShould have experience on programming in Tcl/Tk/Perl to automate design process and improve effic</li></ul>
 iency
 
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