Senior Micro-Architect - Link and Network Layer

1 Hour ago • 3-4 Years • Research & Development

About the job

Summary

Intel seeks a Senior Micro-Architect to design and develop link and network layers for coherent fabric systems in data center and AI chips. Responsibilities include defining micro-architecture and design specifications, developing and optimizing RTL code for high-performance, low-power designs, implementing bridges between industry-standard protocols (e.g., PCIe, CXL, CCIX, AXI), collaborating with architecture and verification teams, conducting performance modeling and timing analysis, participating in design reviews, debugging and resolving issues, and staying updated on industry trends. The ideal candidate will possess strong RTL coding skills, experience in interface bridge development, and expertise in coherent protocols.
Must have:
  • Micro-architecture and RTL design expertise
  • Link and network layer experience
  • Protocol bridge development
  • Coherent protocols (CXL, CCIX, PCIe)
  • High-performance, low-power design
Good to have:
  • Experience with interconnect technologies
  • Proficiency in Verilog or SystemVerilog
  • Knowledge of scripting languages (Python, Perl, or TCL)
Perks:
  • Competitive pay
  • Stock options
  • Bonuses
  • Comprehensive benefits package
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Job Description

Do Something Wonderful!

Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow.

Who We Are

The DCAI and Silicon Eng Team (DASE) deliver leadership Xeon products to cloud and datacenter customers through development of industry leading x86 core and differentiated IPs that enhances product performance and competitiveness in both Xeon and AI platforms. IP design group within DCAI designs Coherent Fabric IP, Memory controller, NOC, PCIE and many fundamental building blocks for the Xeon server SOCs.

Who You Are

We are seeking a highly skilled and motivated Senior Micro-Architect with expertise in the design and development of link and network layers for coherent fabric systems. This role focuses on creating advanced solutions for data center and AI chips. The ideal candidate will have strong hands-on RTL coding skills and extensive experience in interface bridge development for protocol translations.

Your responsibilities include but not limited to:

  • Define micro-architecture and design specifications for link and network layers of coherent fabric systems.

  • Develop and optimize RTL code for high-performance, low-power designs with a focus on scalability and reliability.

  • Implement bridges and translation layers between various industry-standard protocols (e.g., PCIe, CXL, CCIX, AXI, etc.).

  • Work closely with architecture and verification teams to ensure design correctness and alignment with system requirements.

  • Collaborate on performance modeling, timing analysis, and power optimization of the design.

  • Participate in design reviews, ensuring high-quality deliverables and adherence to project schedules.

  • Debug, analyze, and resolve design and implementation issues, working collaboratively across teams.

  • Stay up to date with industry trends in coherent fabrics, AI accelerators, and data center technologies.

  • Excellent communication and collaboration skills.

  • Ability to lead and mentor junior engineers.

  • Strong problem-solving and analytical skills.

Qualifications

 Minimum Qualifications

  • Graduate of Bachelor’s Degree in Electrical Engineering, Computer Engineering, or a related field with at least 4+ years’ experience in the following:

    • Micro-architecture and RTL design for advanced SoCs

    • Expertise in link and network layers of coherent fabric systems

    • Hands-on experience in developing protocol bridges for interface translations; and experience with coherent protocols (CXL, CCIX, PCIe, or similar) and interconnect technologies OR;

  • Graduate of Master’s Degree in Electrical Engineering, Computer Engineering, or a related field with at least 3+ years’ experience in the following

    • Micro-architecture and RTL design for advanced SoCs

    • Expertise in link and network layers of coherent fabric systems

    • Hands-on experience in developing protocol bridges for interface translations; and experience with coherent protocols (CXL, CCIX, PCIe, or similar) and interconnect technologies OR;

  • PhD in Electrical Engineering, Computer Engineering, or a related field.

  • Technical Experience- Proficiency in RTL design using Verilog or SystemVerilog.- Knowledge in micro-architecture and pipeline design.- Expertise in simulation, debugging, and performance tuning tools.- Knowledge in scripting languages (Python, Perl, or TCL) for automation and design flow optimization.

Inside this Business Group

The Data Center & Artificial Intelligence Group (DCAI) is at the heart of Intel’s transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world.

Other Locations

US, Boxborough

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits Annual Salary Range for jobs which could be performed in the US $144,501.00-$217,311.00*Salary range dependent on a number of factors including location and experience

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
View Full Job Description
$144.5K - $217.3K/yr (Outscal est.)
$180.9K/yr avg.
Santa Clara, California, United States

About The Company

Intel’s mission is to shape the future of technology to help create a better future for the entire world. By pushing forward in fields like AI, analytics and cloud-to-edge technology, Intel’s work is at the heart of countless innovations. From major breakthroughs like self-driving cars and rebuilding the coral reefs, to things that make everyday life better like blockbuster effects and improved shopping experiences — they’re all powered by Intel technology. With a career at Intel, you have the opportunity to help make the future more wonderful for everyone.

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