Advanced Package Diagnostics Engineer, Staff

Company:

Qualcomm Semiconductor Limited

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

As semiconductor packaging technologies become increasingly complex such as 2.5D and 3DIC, the demand to quickly isolate sources of failure whether from individual chips or chiplets, interconnects, or weaknesses in the manufacturing/assembly processes becomes an even more critical element in delivering cost-effective solutions. We are seeking a highly skilled and innovative engineer to lead the development of new diagnostics & analytical methodologies to isolate sources of semiconductor package failures. This role goes beyond traditional failure analysis strategies—requiring creativity, cross-disciplinary thinking, and the development of novel package design features, test algorithms, and software diagnostic technologies that do not yet exist. The ideal candidate will be a creative problem-solver with a strong background in semiconductor packaging, data analytics, and cross-functional collaboration.

 

Key Responsibilities:

 

Develop advanced diagnostic methodologies to identify root causes of package failures using electrical test results, software simulation and/or fault models.

Develop advanced analytics & machine learning systems which integrates product characteristics, electrical test responses, and packaging manufacturing data to quickly identify sources of failure in advanced & conventional semiconductor chip packages

Develop data and analytical systems for assembly and substrate manufacturing processes, including defining data requirements and transfer protocols for OSATs, contract manufacturers, and substrate suppliers.

 

Qualifications:

 

M.S. or Ph.D. in Electrical Engineering, Materials Science, Applied Physics, or a related field.

Strong understanding of semiconductor packaging design, material & assembly processes, electrical test methodologies, and failure diagnostics.

Proficiency in data analytics, statistical modeling, and machine learning techniques.

Demonstrated experience in developing innovative solutions to complex, open-ended engineering problems.

Excellent communication skills and the ability to work independently in a fast-paced, exploratory environment.

Travel to OSAT facilities in Taiwan and other Asian countries

 

Preferred Qualifications:

 

Experience working with OSATs or in a high-volume manufacturing environment.

Familiarity with advanced packaging technologies (e.g., 2.5D/3D IC, fan-out, etc.).

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

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