Altera - Analog Layout Design Engineer

Job Description

Job Description:

Looking for highly talented mid senior to senior layout design engineers for Programmable Solution Group in Intel.

Job requires the engineer to Design complex layouts of analog circuits for a given design specification and runs complete set of design verification tools for process design rules, electron migration, voltage drop (IR), ESD, and other reliability checks on the layouts. Designs and analyzes floorplans, power grid, ESD, bumps, and performs all required verification on the analog blocks. Performs the micro floor planning and detail signal planning of complex analog circuits to meet performance and electrical requirements (shielding, matching) for critical signals to optimize for area, power, RV, and performance. Develops and drives new and innovative analog layout methodologies to improve layout productivity and quality. Collaborates with analog circuit design to meet design specifications, plan work, and negotiate layout tradeoffs as needed. Troubleshoots a wide variety of issues up to and including design and tool/flow/methodology used in analog layout design.

In Q4 2023, Intel announced PSG will be reported as a separate business unit beginning on January 1, 2024 with ongoing support from Intel. This position is associated to that standalone business strategy and is expected to fully transition to a standalone company at some time in the future.

Qualifications

 Minimum Qualification -

• Candidate should possess at least bachelor’s degree in electrical engineering or equivalent.
• Should have 3-6 years of Analog and mixed signal layout Experience in deep submicron CMOS technologies.

Preferred Qualification -

• At least 1 years of relevant experience of High speed SerDes building blocks layout design.
• Good understanding of complex designs mainly CTLE, ADC, DACs, Current Bias, RefGen, PLLs, high speed Clock distribution, High speed amplifiers, LDOs etc.
• Sound basics of CMOS transistor and layout effects impacting performance and yield.
• Should be able to handle critical Custom analog blocks from Receiver or Transmitter by accurately coming up with effort estimation, creating precise execution plan which may be independent work or lead small team.
• Works with leads on Top level layout, provides inputs for efficient floorplan.
• Very good understanding of LV, RV and ESD Tools and basic understanding of these domains.
• Good work experience in all flows and tools like Virtuoso/CustomCompiler, Hercules/ICV/Calibre for LV, Redhawk/Voltus/Totem for RV, Extraction tools like StarRC and PERC flow for ESD.
• Good knowledge of Design Rule Decks
• Shows interest and implements automation ideas.
• Strong written and verbal communication relevant to the job requirement is expected.

Inside this Business Group

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel’s offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at https://jobs.intel.com/ and not fall prey to unscrupulous elements.

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change...