ASIC Design Verification Engineer, Machine Learning, Early Career

1 Hour ago • 1 Years + • Research & Development

About the job

Job Description

This role involves verifying complex digital designs for Google's machine learning infrastructure. Responsibilities include planning verification, creating constrained-random verification environments using SystemVerilog and UVM, identifying coverage measures, debugging tests with design engineers, and closing coverage to ensure design correctness. The ideal candidate will have experience in RTL verification using SystemVerilog for ASICs or FPGAs, and a strong understanding of verification methodologies. This is a crucial role in the development of cutting-edge hardware that powers Google's services.
Must have:
  • Bachelor's degree in related field
  • 1 year SystemVerilog experience
  • RTL verification experience
  • UVM/OVM/VMM experience
  • SystemVerilog coding skills
  • Problem-solving & communication skills
Good to have:
  • Master's or PhD degree
  • Full verification life cycle experience
Perks:
  • Bonus
  • Equity
  • Benefits
Not hearing back from companies?
Unlock the secrets to a successful job application and accelerate your journey to your next opportunity.

Minimum qualifications:

  • Bachelor's degree in Electrical Engineering, Computer Engineering, a related field, or equivalent practical experience.
  • 1 year of experience coding in SystemVerilog through internships or work experience.
  • Experience verifying digital logic at the Register Transfer Level (RTL) using SystemVerilog for FPGAs, ASICs, or SOCs.

Preferred qualifications:

  • Master's degree or PhD in Electrical Engineering, Computer Engineering, or a related field.
  • Experience with verification methodology such as UVM/OVM/VMM.
  • Experience with the full verification life cycle.
  • Experience in SystemVerilog.
  • Excellent team player, problem-solving, and communication skills .

About the job

Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google's services. As a Hardware Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.

As a key member of the team, you manage projects in multiple areas with your expertise. You also monitor the performance of vendors working on projects and evaluate new technologies.

In this role, you will use your design and verification expertise to verify complex digital designs. You will collaborate closely with design and verification engineers in active projects and perform direct verification. Using SystemVerilog coding and problem-solving skills, you will build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will be responsible for the full life cycle of verification, from verification planning to test execution, to collecting and closing coverage.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

The US base salary range for this full-time position is $108,000-$158,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target salaries for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about .

Responsibilities

  • Plan the verification of complex digital design blocks, understand the design specification, and interact with design engineers to identify important verification scenarios.
  • Create a constrained-random verification environment using SystemVerilog and Universal Verification Methodology (UVM).
  • Identify and write all types of coverage measures for stimulus and corner-cases.
  • Debug tests with design engineers to deliver correct design blocks.
  • Close coverage measures to identify verification holes and to show progress towards tape-out.
View Full Job Description
$108.0K - $158.0K/yr (Outscal est.)
$133.0K/yr avg.
Worldwide

Add your resume

80%

Upload your resume, increase your shortlisting chances by 80%

About The Company

A problem isn't truly solved until it's solved for all. Googlers build products that help create opportunities for everyone, whether down the street or across the globe. Bring your insight, imagination and a healthy disregard for the impossible. Bring everything that makes you unique. Together, we can build for everyone.

View All Jobs

Get notified when new jobs are added by Google

Similar Jobs

Alpha Sense - Global Strategic Account Executive

Alpha Sense, United States (Hybrid)

Trendyol - Digital Marketing Professionals

Trendyol, Türkiye (Hybrid)

Rush Street Interactive - Senior Full Stack Engineer

Rush Street Interactive, Canada (On-Site)

D3t - Games Associate Art Director

D3t, United Kingdom (Hybrid)

Intel Corporation - Graduate Talent (SOC DFT Verification)

Intel Corporation, Malaysia (Hybrid)

ARF Design   - RTL Design Verification

ARF Design , India (On-Site)

Cirrus Logic - Summer Intern, Design Verification

Cirrus Logic, United States (On-Site)

6sense - Engineering Manager

6sense, India (On-Site)

Get notifed when new similar jobs are uploaded

Similar Skill Jobs

Rank group - Operations Delivery Executive/Assistant

Rank group, Mauritius (On-Site)

Crytek - Lead VFX Artist

Crytek, (Remote)

The Gang - Strategic Marketing Intern

The Gang, Sweden (Hybrid)

Publicis Groupe - Assistant Manager- Paid Media

Publicis Groupe, India (On_site)

Moon Active - Game Development Manager

Moon Active, Poland (On-Site)

IO Interactive - Junior Procurement Specialist

IO Interactive, United Kingdom (Hybrid)

SciPlay - Manager, Data Engineer

SciPlay, India (On-Site)

Warner Bros Discovery - Paralegal

Warner Bros Discovery, Singapore (On-Site)

Get notifed when new similar jobs are uploaded

Research & Development Jobs

Power Integrations - Staff Analog IC Design Engineer

Power Integrations, United States (On-Site)

Cadence - Lead Software Engineer

Cadence, China (On-Site)

TechnipFMC - Engineer II

TechnipFMC, India (On-Site)

Regent Craft - Modeling & Simulation Intern

Regent Craft, United States (On-Site)

Luxoft - Senior C++ Engineer

Luxoft, United States (Remote)

Alphawave Semi - Staff Engineer II - DTA

Alphawave Semi, India (On-Site)

Get notifed when new similar jobs are uploaded