ASIC Engineer, Design
Job Summary
Job Description
- 15+ years micro-architecture & RTL development
- Complex SoC/IP subsystem experience
- Verilog, SystemVerilog, HLS proficiency
- Collaboration with verification & implementation teams
- Bachelor's degree in relevant field
- Data path development experience
- CPU, network protocols, NOC, memory & peripheral subsystem expertise
- Synthesis, timing closure, formal verification knowledge
- Master's or PhD in EE/CS
- Bonus
- Equity
- Benefits
2 skills required
Job Details
- Architecture exploration
- Micro-architecture development
- RTL development using Verilog, System Verilog and HLS
- Soft and hard IP identification, selection and integration
- Collaboration with verification and emulation teams in test plan development and debug
- Collaboration with implementation team to close the design on timing and power
- 15+ years of experience in micro-architecture and RTL development for complex control and data path IPs
- Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.
- Experience in leading complex SOCs or IP subsystems
- Experience in data path development
- Experience in CPU, Network protocols, NOC, Memory and Peripheral Subsystems
- Experience with Synthesis, Timing Closure and Formal Verification Methodology
- Master’s or PhD degree in Electrical Engineering, Computer Science or related areas
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About The Company
Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology.
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