Design Engineer II

2 Months ago • All levels • Research & Development

About the job

Job Description

Design Engineer II at Cadence, requires expertise in high-speed analog/mixed-signal IC circuit blocks. Strong problem-solving, analog aptitude, and communication skills are essential. Experience with high-speed analog circuits, mixed-signal code, and Cadence tools is mandatory.
Must have:
  • High Speed Analog
  • Mixed Signal Code
  • Cadence Tools
  • Problem Solving
Good to have:
  • Low Jitter PLL
  • High Speed Clock
  • Cadence EDA Tools
  • Python or Perl
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At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Job Description:

· Responsible for the design and development of high speed analog/mixed signal IC circuit blocks from initial concept and specification through final verification and conformance to customer requirements.

· Candidate’s background should demonstrate good problem solving skills, excellent analog aptitude, good communication skills, and ability to work cooperatively in a team environment.

· Must have demonstrated experience in high speed analog circuit and skill of behavioral mixed signal code

· Operational Amplifier; Low jitter PLL; High Speed Clock Distribution; Bias and Bandgap; Voltage Regulators etc

· Candidate should have working knowledge of a set of common high speed Interface standards and their electrical requirements, and a thorough understanding of jitter.

· Position requires proficiency in using CAD tools for circuit simulation, layout, and physical verification (Cadence tool experience, lab test experience, and experience at 65nm and below technologies are a plus).


Position Requirements:

· Master degree, major in Micro-Electronics, Electronic Engineering or equivalent

· Ability to work effectively alone or as well as in a team.

· Essential that the individual demonstrates strong communication, verbal and written

· Requires good communication skills in English.


Desirable Qualifications:

· Knowledge of one of key Analog IC design area:

· High speed comparator; PLL's; Oscillators; Low Noise Design etc

· Solid understanding of IC design technology and process/methodology in IC design solutions

· Familiar with Cadence analog and mixed-signal EDA tools is a plus

· Familiar with Python or Perl is better

We’re doing work that matters. Help us solve what others can’t.

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San Jose, California, United States (On-Site)

San Jose, California, United States (On-Site)

San Jose, California, United States (On-Site)

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