Design Verification Engineer, Security
Job Summary
Job Description
This Design Verification Engineer role focuses on verifying complex security hardware IPs at both IP and subsystem levels. Responsibilities include planning verification strategies, creating and enhancing verification environments using SystemVerilog and UVM, developing coverage measures, debugging tests with design engineers, and collaborating with software, silicon validation, and silicon bring-up teams. The ideal candidate will have experience verifying security blocks, hardware security modules, and crypto blocks, as well as experience with fault injection-based verification. A strong understanding of verification methodologies, SystemVerilog Assertions (SVA), and assertion-based verification is crucial. The role involves working on custom silicon solutions for Google's direct-to-consumer products.
Must have:
- 3+ years experience verifying IP or digital systems
- Experience with UVM and SystemVerilog
- Proficiency in SVA and assertion-based verification
- Plan and execute verification of complex Security IPs
- Collaborate with cross-functional teams
Good to have:
- Experience verifying security blocks, HSMs, crypto blocks
- Fault injection based verification experience
- Perl or Python scripting experience
- Experience with Automotive security blocks
3 skills required
Job Details
Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Science, or a related field, or equivalent practical experience.
- 3 years of experience in verifying IP or digital systems that include components like CPU, Direct Memory Access, interconnects, Memory Management Unit, peripherals and memories.
- Experience creating and using verification components and environments in a standard verification methodology such as Universal Verification Methodology.
- Experience with verification techniques, System Verilog Assertions (SVA) and assertion-based verification.
Preferred qualifications:
- Experience in verification of security block, Hardware Security Modules, crypto blocks.
- Experience with Fault injection based verification of Automotive or Security blocks.
- Experience with Perl or Python scripting, including developing or enhancing Design Verification (DV) flows.
About the job
Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You will contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Responsibilities
- Plan the verification of complex Security hardware IPs at IP and subsystem level by fully understanding the design specification and interacting with Architecture and Design Engineers to identify important verification scenarios.
- Create and enhance verification environments using System Verilog and Universal Verification Methodology (UVM). Identify and write all types of coverage measures for stimulus.
- Debug tests with design engineers to deliver design blocks. Close coverage measures to identify verification holes and to show progress towards tape-out.
- Collaborate with Software, Silicon Validation, and Silicon bring up teams.
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