The ESD Engineer will be responsible for I/O library development, including design, simulation, characterization, and validation of I/O pad libraries. They will define the ESD methodology and chip/IP level ESD requirements, designing ESD protection devices. The engineer will also develop test structures, drive design rule development, and interface with Foundries. The role requires a comprehensive understanding of ESD/EOS protection for mixed-signal CMOS circuits, ensuring a holistic approach. Responsibilities include designing and simulating I/O circuits, characterization and modeling of I/O libraries, releasing and maintaining libraries, and leading ESD sign-off methodology.