Formal Verification Engineer

21 Hours ago • 5-12 Years • Software Development & Engineering

Job Summary

Job Description

Develop and master formal verification environments for control path and/or datapath designs. Collaborate closely with cross-geographical design and architecture teams to understand specifications and identify verification needs. Create and maintain formal models and properties for CPU components; analyze and debug verification failures, providing feedback and solutions to design teams. Guide and train team members in using formal tools and methodologies to successfully complete their verification assignments. Stay updated with the latest advancements in formal verification technologies and methodologies, integrating them into the team's workflow. Benchmark and develop new formal methodologies and tool flows to prove the correctness and reliability of complex digital circuits.
Must have:
  • Master's degree in Electrical Engineering or Computer Science
  • 5-12 years of experience in formal verification
  • Strong understanding of digital design principles
  • Proficiency in formal verification methodologies and tools
  • Extensive experience with hardware description languages
  • Excellent problem-solving and debugging skills
  • Effective communication and teamwork abilities
Good to have:
  • Proficiency in scripting languages (Tcl, Python, Perl)

Job Details

Job Details:

Job Description: 

  • Develop and master formal verification environments for control path and/or datapath designs.
  • Collaborate closely with cross-geographical design and architecture teams to understand specifications and identify verification needs.
  • Create and maintain formal models and properties for CPU components; analyze and debug verification failures, providing feedback and solutions to design teams.
  • Guide and train team members in using formal tools and methodologies to successfully complete their verification assignments.
  • Stay updated with the latest advancements in formal verification technologies and methodologies, integrating them into the team's workflow.
  • Benchmark and develop new formal methodologies and tool flows to prove the correctness and reliability of complex digital circuits

Qualifications:

  • Master's degree in Electrical Engineering, Computer Science, or a related field, with 5-12 years of experience in formal verification.
  • Strong understanding of digital design principles and CPU architecture.
  • Proficiency in formal verification methodologies and tools such as JasperGold, VC-Formal, or equivalent.
  • Extensive experience with hardware description languages (Verilog, VHDL) and formal verification languages (SystemVerilog Assertions, PSL).
  • Excellent problem-solving and debugging skills, with effective communication and teamwork abilities.
  • Proficiency in scripting languages such as Tcl, Python, or Perl is a plus

          

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location: 

India, Bangalore

Additional Locations:

Business group:

The Core and Client Development Group (C2DG) is a worldwide organization focused on the development and integration of SOCs, Core ™, and critical IPs that power Intel's leadership products, driving most of the Client roadmap for CCG, Delivering Server First Cores that enable continued growth for DCG and invest in future disruptive technologies.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

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