Performs functional verification of graphics logic components, including 3D graphics, media, and display, to ensure design will meet specification requirements. Defines and develops scalable and reusable IP verification plans, test benches, and architecture for verification environment to ensure coverage to confirm to graphics microarchitecture specifications. Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates with GPU architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features and to meet functional, performance, and power goals. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Maintains and improves existing functional verification infrastructure and methodology. Participates in the definition of verification infrastructure and related TFMs needed for functional design verification.
BE with 5 years of Experience OR MS/MTECH with 4 Years of Design Verification Experience Experience with Verification of Subsystem and/or SoC having GPU/CPU Experience in writing UVM based Tests, Assembly based tests, tests using high level languages like Open GL AND/OR Open CL Knowledge of Graphics 3D and/or Compute Pipeline Knowledge of Cache Controllers and Memory protocols like HBM, LPDDR, GDDR Knowledge of Industry Standard Emulation Tools like Zebu/Veloce/Palladium Experience of Performance Verification is a Plus Knowledge of Performance Analysis/Bottleneck Analysis of 3D AND/OR Compute workloads is a plus
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