Hardware Design/Verification Engineer (FPGA, UVM)

Kforce's client, a fast-growing technology company, is seeking an experienced Hardware Design/Verification Engineer in Marlborough, MA. This role involves developing high-speed signal processing algorithms and network protocols in FPGAs, performing RTL design verification using SystemVerilog/UVM, and developing UVM testbenches. The engineer will also write and debug test cases, participate in design/code reviews, and manage UVM code revisions, owning and resolving technical issues throughout the verification process.

Must Have

• Develop high-speed signal processing algorithms and network protocols in FPGAs
• RTL design verification using SystemVerilog/UVM
• Develop UVM testbenches for verifying FPGA designs
• Write and debug test cases
• Participate in design/code reviews and manage UVM code revisions
• Own and resolve technical issues throughout the verification process
• BS in Electrical Engineering, Computer Engineering, or related discipline
• 7+ years of related hardware design experience
• Experience with design and implementation of FPGA modules using Verilog or VHDL
• Knowledge of UVM verification
• Strong communication and collaborations skills

Perks & Benefits

• Comprehensive medical/dental/vision insurance
• HSA
• FSA
• 401(k)
• Life, disability & ADD insurance
• Paid time off (for salaried personnel)

Description

Kforce's client, a fast-growing technology company delivering innovative communications products and services worldwide, is seeking an experienced engineer. In this role, the engineer will work alongside a collaborative team of engineers developing the next generation of advanced communications systems. Key Responsibilities:

• Develop high-speed signal processing algorithms and network protocols in FPGAs
• RTL design verification using SystemVerilog/UVM
• Develop UVM testbenches for verifying FPGA designs
• Write and debug test cases
• Participate in design/code reviews and manage UVM code revisions
• Own and resolve technical issues throughout the verification process

Requirements

• BS in Electrical Engineering, Computer Engineering, or related discipline
• 7+ years of related hardware design experience
• Experience with design and implementation of FPGA modules using Verilog or VHDL
• Knowledge of UVM verification
• Strong communication and collaborations skills

The pay range is the lowest to highest compensation we reasonably in good faith believe we would pay at posting for this role. We may ultimately pay more or less than this range. Employee pay is based on factors like relevant education, qualifications, certifications, experience, skills, seniority, location, performance, union contract and business needs. This range may be modified in the future.

We offer comprehensive benefits including medical/dental/vision insurance, HSA, FSA, 401(k), and life, disability & ADD insurance to eligible employees. Salaried personnel receive paid time off. Hourly employees are not eligible for paid time off unless required by law. Hourly employees on a Service Contract Act project are eligible for paid sick leave.

Note: Pay is not considered compensation until it is earned, vested and determinable. The amount and availability of any compensation remains in Kforce's sole discretion unless and until paid and may be modified in its discretion consistent with the law.

This job is not eligible for bonuses, incentives or commissions.

Kforce is an Equal Opportunity/Affirmative Action Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, pregnancy, sexual orientation, gender identity, national origin, age, protected veteran status, or disability status.

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