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High Speed IO Validation Engineer

4 Days ago • 3 Years + • Research & Development

Job Summary

Job Description

NVIDIA's Silicon Solutions group seeks a High Speed IO Validation Engineer to join their team. Responsibilities include developing strategies and infrastructure for next-generation HSIO (PCIe, Coherency Interfaces) bring-up, validation, and product integration. The engineer will ensure interoperability with connected devices in complex topologies, debug challenging HSIO bugs, work on system-level power strategies, and collaborate with various engineering teams. This role requires expertise in high-speed IOs, power management optimization, and experience with silicon bring-up and lab tools. The ideal candidate will possess strong EE fundamentals, computer architecture knowledge, and experience with automation scripting languages.
Must have:
  • 3+ years post-silicon bring-up experience
  • HSIO validation (PCIe, USB)
  • System-level power mgmt. optimization
  • Experience with lab tools (oscilloscopes, etc.)
  • Strong EE fundamentals and computer architecture knowledge
Good to have:
  • Experience with automation scripting (Perl, Python, tcl)
  • Linux experience

Job Details

NVIDIA Silicon Solutions group is seeking a versatile engineer to be part of a High Speed Interconnect validation team. You will dive into high-speed interconnects like PCIe, NVLINK, C2C -  perform bringup. validation and interop across various end user scenarios, with strong emphasis stability and efficiency. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from artificial intelligence, consumer graphics, self-driving cars, and more

What you’ll be doing:

  • Develop strategies and infrastructure for next generation HSIO (PCIe, Coherency Interfaces) bring up, validation and product integration with a deep understanding of IO design, specs, use case and topologies.

  • Ensure interoperability with connected devices and system components in complex interconnect topologies

  • Ready to deep dive into technically challenging HSIO bugs and help drive debug efforts across various teams

  • Work on system level power strategies to continue pushing performance in power constrained systems

  • Work closely and proactively with other engineering teams such as system architects,  mixed signal and design, DGX, software/firmware, HW/SW QA, operations and AE teams to drive design, development, debug and release of next generations products.

What we need to see:

  • BS or MS degree in EE/CE or equivalent experience

  • Minimum 3 years working in post-silicon bring up, IO validation, and/or power optimizations on High Speed IOs for datacenter and Automotive ecosystems.

  • Experience with HSIOs like PCIE or USB including understanding of process/temp/voltage sensitivity on BER

  • Experience with system level and interconnect power management optimizations.

  • Background of electrical tuning/performance/challenges of HSIOs

  • Understanding of firmware/driver structures and their interaction with HW.

  • Hands-on validation lab experience with silicon bring-up, lab debug and lab tools (oscilloscopes, multi-meters, logic analyzers)

  • Strong EE fundamentals, knowledgeable in computer architecture, high speed interfaces, timing analysis, process variations, statistical error rates and power analysis.

  • Excellent problem solving, teamwork, and interpersonal skills.

  • Background with automation scripting in languages such as Perl, Python, tcl.

  • Experience with Linux

#LI-Hybrid

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About The Company

Since its founding in 1993, NVIDIA (NASDAQ: NVDA) has been a pioneer in accelerated computing. The company’s invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined computer graphics, ignited the era of modern AI and is fueling the creation of the metaverse. NVIDIA is now a full-stack computing company with data-center-scale offerings that are reshaping industry.


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