Lead Application Engineer

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Job Responsibility
•    Customer support, consulting and project management based on Cadence’s semiconductor design environment.
•    Discover customer challenges, propose and deliver methodologies with Cadence products
•    Understand customer's technical challenges and improve products
•    Provide custom scripting to fit the customer's design environment
•    Responsible for product feature demonstrations, presentations, and training instructors
•    Main product：Allegro Package Designer Plus(APD Plus), Integrity 3DIC etc
•    https://www.cadence.com/en_US/home/solutions/3dic-design-solutions.html
Qualification Requirements
•    Majored in Electrical Engineering or some other equivalent
•    Has the knowledge and desire to take on new challenges
Experiences/Skills
•    At least 5 years of experience for PCB or package layout design and knowledge, or at least 5 years of experience for layout tool support.
•    Good organization and communication skills between difference groups and customers.
•    Communication skill and technical conversation in English.
•    Must have business Japanese skill (N1 level, Minimum 3 years of business experience in Japan “using Japanese”).
Better to have:
•    Programing experiences, such as SKILL, Perl, Tcl, Python etc.
•    Have knowledge for 2.5D/3D-IC designs platform
•    Experience in project management with customers
 

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