Principal Design Engineer

5 Hours ago • 6-10 Years

Job Summary

Job Description

The Principal Design Engineer role at Cadence involves developing firmware and DSP architecture verification and enhancement for AI/Vision applications. Responsibilities include developing and testing customized instructions, debugging and optimizing examples, supporting the HW team, and generating documentation. The role requires a strong understanding of DSP architecture, experience in signal processing algorithms, and proficiency in C and assembly-language programming. Candidates should have experience in optimizing DSP, AI/Video/Imaging algorithms and possess good technical communication skills. This position is located in Bangalore, India and candidates with more experience will be considered.
Must have:
  • Experience in developing and optimizing core signal processing algorithms in C
  • Good knowledge of processor ISA/architecture for at least 1-2 DSP
  • Experience in applying principles of good software and interface design
  • Good technical communication skills are required
  • Experience/knowledge of ai-video-image processing
Good to have:
  • Experience/knowledge of RISC-V processors is desirable

Job Details

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality.  Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.

The Cadence Advantage

  • The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact.
  • Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees.
  • The unique “One Cadence – One Team” culture promotes collaboration within and across teams to ensure customer success
  • Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests
  • You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other—every day.

Job responsibilities:

Job Description :  Lead Design Engineer (for DSP – Vision group), Location: Bangalore

Cadence/ Tensilica DSP processors are based on the proven Xtensa architecture and are configurable with two unique features:

Job Description

  • Educational qualification: BE/BS in EC, CS or EE is required.  MTech/MS is preferred. Education needs to be from a reputed institute – preference would be given to IITs, IISc, BITS , REC.
  • EXP:6-10years

This job involves the development of firmware and DSP architecture verification and enhancement for AI/Vision applications. This involves:

  • Developing and testing customized instructions for accelerating AI, Image and Video processing algorithms using the C Intrinsics for underlying TIE based ISA.
  • Developing, debugging and optimizing  examples and software libraries for AI, Image and Video processing  algorithms
  • Support the HW team to make sure that the customized instructions are optimized considering hardware gate count & power and verification of the customized instructions.
  • Generating the engineering and customer documentation.

Required Skills

  • The candidate should have a good experience in developing and optimizing core signal processing algorithms (for AI, Video and Imaging domain)  in C and assembly-language/intrinsic programming for a DSP or DSP-like processor.
  • The candidate should have a good knowledge of processor ISA/architecture for at least 1-2 DSP  and should have a very good grasp of the issues surrounding software performance tuning for the given DSP ISA/architecture. 
  • The candidate should have experience in applying principles of good software and interface design and should have experience with at least one revision control system.
  • Good technical communication skills are required.
  • Candidate must be self-motivated and capable of working independently.
  • Experience/knowledge of  ai-video-image  processing  is required.
  • Experience/knowledge of RISC-V processors is desirable.
  • 6+ years of work experience in optimization of DSP, AI/Video/Imaging algorithms/modules for a given DSP. Candidates with higher experience may also be considered.
  • Educational qualification: BE/BS in EC, CS or EE is required.  MTech/MS is preferred. Education needs to be from a reputed institute – preference would be given to IITs, IISc, BITS , REC.

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About The Company

Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences. Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world’s toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence.

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