Senior Design Verification Engineer

1 Hour ago • 7-10 Years • Research & Development

About the job

Job Description

Microsoft's AI Silicon Engineering (AISiE) SoC Design Verification team seeks a Senior Design Verification Engineer to collaborate with cross-functional teams. Responsibilities include developing verification environments, test cases, debugging, and applying techniques to detect hardware/software vulnerabilities in AI accelerators. The role involves working on complex flows at the SoC, subsystem, or IP levels, defining verification strategies, and improving verification efficiency. The ideal candidate will have experience in simulation environments, Verilog/VHDL, C/C++, Python, and chip/computer architecture.
Must have:
  • 7+ years relevant experience
  • Simulation environment creation
  • Test development and debugging
  • Verilog/VHDL, C/C++, Python
  • Chip/computer architecture knowledge
  • Meet Microsoft security screening requirements
Good to have:
  • CPU or graphics core verification
  • System Verilog, UVM, and coverage
  • Hardware design for embedded systems
  • Firmware development
  • Hardware emulation or FPGAs
  • Synthesizable code writing
  • Software development experience
  • Excellent communication skills
Perks:
  • Industry-leading healthcare
  • Educational resources
  • Product and service discounts
  • Savings and investments
  • Maternity and paternity leave
  • Generous time away
  • Giving programs
  • Networking opportunities

Overview

Microsoft is a highly innovative company that collaborates across disciplines to produce cutting edge technology that changes our world.  The AI Silicon Engineering (AISiE) SoC Design Verification team is seeking a Principal Design Verification Engineer  who can work with cross-discipline teams (including systems, firmware, architecture, design, validation, and product engineering) to develop environment and test cases to verify Microsoft’s latest AI accelerators. The candidate should be passionate about developing systematic and efficient methods to detect hardware/software vulnerabilities.

 

The team is seeking a Senior Design Verification Engineer  to deliver premium-quality AI accelerator designs once considered impossible. We are responsible for delivering cutting-edge, custom Intellectual Property(IP) and System on Chip(SoC) designs that can perform complex and high-performance Artificial Intelligence(AI) operations in an extremely efficient manner.

 

Microsoft’s mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond.

 

In alignment with our Microsoft values, we are committed to cultivating an inclusive work environment for all employees to positively impact our culture every day.

Qualifications

Required/Minimum Qualifications

  •  7+ years of related technical engineering experience
    • OR Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience or internship experience
    • OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience or internship experience
    • OR Doctorate degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
  • 6+ years of experience in creating simulation environments, developing tests, and debugging for multiple silicon IP's or systems.
  • 1+ years’ industry experience of chip and/or computer architecture.
  • 1+ years industry experience in Verilog or VHDL, C/C++, and scripting language such as Python, Ruby or Perl.

Other Requirements:

  • Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.
  • This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations.  As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.

Preferred Qualifications: 

  • Prior experience in two or more of the following will also be valuable: 
  • CPU or graphics core verification. 
  • In depth knowledge of verification principles, testbenches, stimulus generation, System Verilog, UVM, and coverage. 
  • Experience with hardware design for embedded systems. 
  • Firmware development, with secure and non-secure boot flow. 
  • Experience with hardware emulation or FPGAs. 
  • Design experience or ability to write synthesizable code. 
  • Software development experience. 
  • Excellent communication skills. 
  • Energetic and self-motivated. 

Silicon Engineering IC4 - The typical base pay range for this role across the U.S. is USD $117,200 - $229,200 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $153,600 - $250,200 per year.

Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:

 

Microsoft will accept applications for the role until January 7, 2025. 


#AHSI #SCHIE

Responsibilities

  • Own or lead verification of complex flows at the SOC, subsystem, or IP levels
  • Learn about the design and interact with partner teams to define verification strategies and test plans
  • Develop verification environments and run and debug simulations to drive quality
  • Apply random-stimulus and coverage-based techniques to find bugs and meet test plan goals
  • innovate to improve verification efficiency through methodologies or tools
  • Plan the verification of complex design IP/SoC interacting with the architecture and design engineers to identify verification test scenarios.
  • Coach and mentor others in your areas of expertise
  • Demonstrate Microsoft core values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Drive for Results, Influence for Impact, Judgement, and Diversity & Inclusion
Benefits/perks listed below may vary depending on the nature of your employment with Microsoft and the country where you work.
Industry leading healthcare
Educational resources
Discounts on products and services
Savings and investments
Maternity and paternity leave
Generous time away
Giving programs
Opportunities to network and connect
View Full Job Description
$117.2K - $250.2K/yr (Outscal est.)
$183.7K/yr avg.
Mountain View, California, United States

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About The Company

Microsoft is a tech giant that develops, licenses, and supports a range of software products, services, and devices.

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