Senior Engineer II - VLSI

1 Year ago • 5-7 Years

Job Summary

Job Description

The Senior Engineer II - VLSI will be responsible for the front-end implementation of IPs, including synthesis, LEC, and CLP. They will collaborate with designers and PNR teams to achieve design closure, focusing on quality. They will also debug and resolve technical issues and generate functional ECOs using Candence conformal LEC. A good understanding of RTL and synthesis-related warnings is necessary. This role involves working with complex designs, multiple high-frequency clocks, and complex clocking schemes.
Must have:
  • 5-7 years’ experience in physical aware synthesis
  • Complete understanding of timing constraints and DFT
  • Experienced in synthesis, LEC, CLP and timing closure
  • Handled blocks with complex designs and clocking
  • Scripting and automation experience is a must
Perks:
  • Competitive Compensation Package
  • Restricted Stock Units (RSUs)
  • Provisions to pursue advanced education
  • Medical Insurance and a cohort of Wellness Benefits
  • Educational Assistance
  • Advance Loan Assistance
  • Office lunch & Snacks Facility

Job Details

The Opportunity


We're looking for the Wavemakers of tomorrow.

Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology.

What You'll do:

  • Responsible for front end implementation of IPs which includes Synthesis, LEC, CLP.
  • Collaborate with designers and PNR teams to achieve design closure with focus on Quality
  • Ability to debug and resolve technical issues.
  • Hands on functional ECO generation using Candence conformal LEC
    Should be able to provide good support to Gate level simulations (GLS) team
    Overall, should have good knowledge on RTL so as to understand all synthesis related warnings.

What You'll Need:

  • 5-7 years’ experience in physical aware synthesis.
  • Self-motivated
  • complete understanding of timing constraints, low power aspects and concepts of DFT
  • Experienced in synthesis, LEC, CLP and timing closure
  • Should have handled blocks with complex designs, multiple high frequency clocks and complex clocking.
  • scripting and automation experience is a must.

'' We have a flexible work environment to support and help employees thrive in personal and professional capacities"

As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes:

  • Competitive Compensation Package
  • Restricted Stock Units (RSUs)
  • Provisions to pursue advanced education from Premium Institute, eLearning content providers
  • Medical Insurance and a cohort of Wellness Benefits
  • Educational Assistance
  • Advance Loan Assistance
  • Office lunch & Snacks Facility

Equal Employment Opportunity Statement

Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process.

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About The Company

Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data demanding industries today including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission critical data communication, our innovative technologies, and proven track record.

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