Description
Job Summary
As a Senior Mixed-Signal IC Design and Verification Engineer, your primary role involves design and verifying of Mixed Mode Integrated Circuits that combine both, analog and digital components. Responsibilities include developing verification strategies, creating testbenches, and designing test cases for mixed-signal functionality. You'll collaborate closely with analog and digital design teams, use simulation tools to ensure accurate performance, and debug issues. Strong expertise in mixed-signal verification methodologies, understanding of analog and digital circuitry, and proficiency in simulation tools are crucial for success in this role.
Key responsibilities
- Work closely with cross-functional teams, including digital design, analog design, and test.
- Develop verification plans for testing mixed-signal IC functionality.
- Design and implement testbenches to verify analog and digital components of mixed-signal circuits.
- Conduct simulations to ensure correct functionality and performance of mixed-signal circuits under various conditions.
- Analyze simulation results, identify issues, and collaborate with design teams to resolve problems in the IC.
- Create and maintain documentation for verification processes, methodologies, and results.
- Utilize relevant EDA tools for simulation and verification tasks.
- Collaborate with test engineering teams to transition from simulation to actual hardware testing.
- Provide guidance and mentoring to junior engineers and contribute to improving verification processes.
Requirements
- BS degree in Electronics Engineering or related course .
- 5+ years of experience working in an IC design and verification environment.
- Have worked on verifying designs which have gone into production.
- Have a solid understanding of electronics principles and basic functions (Comparators, OpAmps, DACs, ADCs, Bandgaps, etc.)
- Have a strong understanding of mixed signal verification principles and current methods.
- Expert in both analog and digital simulation tools (preferably Cadence based)
- Familiar with languages such as Verilog, SystemVerilog or VerilogAMS.
- Have experience in using behavioral models as part of the verification flow.
- Have working knowledge of MS Word, Excel and PowerPoint.
- Have excellent verbal, written and presentation communication skills.
- Comfortable working in a process driven, ISO 9000 framework for new product introduction.
- Produce accurate documentation to the highest standards of completeness and precision for presentation.