Senior Quantitative Developer (Low-Latency, C++)

About BestEx Research

BestEx Research is a financial technology and research firm specializing in building sophisticated execution algorithms and transaction cost modeling tools servicing multiple asset classes. The firm provides high-performance algorithmic execution services to hedge funds, CTAs, asset managers, and banks through a traditional electronic broker and in a broker-neutral Software as a Service (SaaS) model.

Its cloud-based platform, Algo Management System (AMS), is the first end-to-end algorithmic trading solution for equities and futures that delivers an entire ecosystem around execution algorithms, including transaction cost analysis (TCA), an algorithm customization tool called Strategy Studio, a trading dashboard, and pre-trade analytics in a single platform. The platform is currently live for U.S., Europe, and Canadian equities and global futures trading.

BestEx Research is disrupting a $100 billion industry by challenging the status quo of stale, black-box solutions from banks and offering next-generation execution algorithms that combine performance improvement with transparency and customization. BestEx Research uses leading-edge technology to support its low-latency, highly scalable research and trading systems, with its backend in C++, research libraries in C++/Python and R, and web-based technologies for delivering its front-end platforms.

BestEx Research’s mission is to become the leader in automation and measurement of execution across asset classes globally and significantly reduce transaction costs for our clients.

Visit bestexresearch.com for more information about our mission, products, research, and services.

Why Join Us?

BestEx Research’s Bangalore office is not an “offshore center.” It’s a core engineering and research hub—working on the exact same problems and projects as our U.S. team. You’ll be part of the global brain trust, solving some of the hardest problems in trading, systems, and data science.

What You’ll Love:

• Zero bureaucracy, zero silos—engineers directly collaborate with traders, researchers, and the CEO.
• Direct ownership and end-to-end visibility on production systems.
• Daily opportunity to learn from pioneers in HFT, low-latency systems, and algo trading.
• A high-trust environment where performance speaks louder than hierarchy.
• Competitive compensation in India, including equity and cash bonuses.
• 5-week structured training program:

1. Market microstructure and trading mechanics
2. Algorithmic execution and strategy design
3. Exchange simulators and performance testing
4. Market data systems and real-time analytics
5. Hands-on exercises using production research data

• Continuous professional development, with refresher courses, advanced sessions, and on-demand training tailored to your growth.
• Global exposure: Opportunities to collaborate with, visit, or relocate to our U.S., Singapore, or London offices, based on performance and business needs.

Your Role: Build What Most Engineers Never Get to Touch

You’ll be part of a lean, focused team building ultra-low-latency trading systems, real-time exchange simulators, execution algorithms, and alpha forecasting models. Our engineers own the stack—from C++ nanosecond-sensitive infrastructure to Python-based research platforms.

This role is ideal for someone who thrives at the intersection of research and engineering—comfortable building systems, testing hypotheses, and working directly with data that moves markets.

What You’ll Work On

• Architect and implement:

1. Execution algorithms across global markets
2. Exchange simulators and tick-level backtesting frameworks
3. Smart Order Routing systems across lit and dark venues
4. Models for market impact, price prediction, and volume forecasting
5. High-performance trading systems optimized for throughput and latency
6. Core infrastructure to support new asset classes and global markets

• Collaborate closely with global quants, traders, and senior engineers
• Analyze system performance across app, OS, and hardware layers