Senior Verification Engineer

5 Months ago • 4 Years + • Research & Development

Job Summary

Job Description

Ceragon Networks seeks a Senior Verification Engineer with 4+ years of experience in SystemVerilog UVM-based verification. Responsibilities include verifying complex SoCs/FPGAs, networking, and modem designs; defining and implementing verification environments and architectures; developing test and coverage plans; and working collaboratively with cross-functional teams. Experience with Specman is advantageous, along with a strong understanding of advanced verification methodologies and networking IPs (Ethernet switching, SOC). Familiarity with PCI-E and DDR4/5 memory controllers is a plus.
Must have:
  • 4+ years SystemVerilog UVM verification
  • Advanced verification methodologies
  • Networking IPs experience
  • Test plan & environment development
  • Team player
Good to have:
  • Specman experience
  • PCI-E, DDR4/5 experience
  • SOC background

Job Details

About the job

Job Description

About Company:

Ceragon Networks ( https://www.ceragon.com/about-ceragon/ ) is a company that develops innovative equipment used in wireless data transmission among other software and service solutions. Our systems are based on microwave technology and serve as a cost-effective alternative to fiber optics.

Job: Senior Verification Engineer

Ceragon Networks is looking for an Experienced Verification Engineer for an exciting Job in its complex SoC/FPGAs, Networking and Modem verification team.

Performing Verification in the most advanced verification methodologies/tools, implementing State of the Art verification for complex ASIC.

We are looking for talented verification engineer which have abilities to own complex tasks on one hand and on the other hand be a team player, working with different vertical team and disciplines.

  • Responsible for the Verification of Various IPs and top level designs.
  • Defining and implementing the Environment architecture.
  • Defining and implementing Test plans, coverage plans, etc

Job Requirements

  • At least 4+ years’ experience with system Verilog UVM based verification
  • Experience with Specman (Advantage)
  • Deep understanding of verification concepts and advanced methodologies
  • Experience developing verification environments from scratch
  • Background in Networking Ips, Ethernet Switching , SOC desired
  • Understanding of verification and design practices
  • Experience with PCI-E, DDR4/5 memory controllers (Advantage)
  • Team player
  • Dynamic person
  • Hands on experience in ASIC verification
  • Fast Learner
  • Education: BS/BE/BTech/MS/ME/MTech or equivalent

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