Silicon Bringup and Validation Engineer
Job Summary
Job Description
The Silicon Bringup and Validation Engineer is responsible for bringing up and validating SOC subsystems in Rivos SOC design. This role requires a deep understanding of state-of-art SOC design, covering physical design, logic, performance, power, and software. Responsibilities include leading an engineering team in designing, implementing, and executing subsystem silicon bringup plans, including functional and performance tests. The role also involves collaborating with cross-functional teams (design, architecture, firmware, software) and vendors for successful integration and validation, debugging issues, and driving improvements in bringup and validation processes.
Must have:
- In-depth knowledge of subsystem architecture, microarchitecture, and software interface
- Experienced C/C++ and Python skills
- Knowledge of verification methodologies, Verilog simulation, waveform viewers, and emulation
- Experience in silicon debug for logic, software, and physical issues
- Strong ability to triage issues and develop environments/tools
- Excellent problem-solving, communication, and organization skills
- Self-motivated and able to work productively under aggressive schedules
Good to have:
- Experience in key components like Power Management, DDR/HBM, PCIe, CPU, and data accelerators
- Vendor and partner collaboration experience
3 skills required
Job Details
The Silicon Bringup and Validation Engineer is responsible for bringing up and validating the SOC subsystems in Rivos SOC design. This role requires a deep understanding of state-of-art SOC design in various aspects from physical design, logic, performance, power, and software. We have positions open in key components of the design such as Power Management, DDR/HBM, PCIe, CPU, and data accelerator. The tasks include test generation, test infrastructure setup, bringup planning and execution, validation plan development and execution. At this time, we plan to staff the technical leads or senior technical staff positions.
Responsibilities
- As a lead, you will lead an engineering team responsible for designing, implementing and executing a subsystem silicon bringup plans, including functional and performance tests, to validate the subsystem for the silicon product to meet the product requirements.
- Collaborate with cross-functional teams including design, architecture, firmware, and software to ensure successful subsystem integration and validation.
- Work with vendors and partners to ensure successful subsystem bringup and validation, including reviewing and providing feedback on vendor documentation, and coordinating with vendor support teams.
- Debug and root-cause issues found during subsystem bringup and validation, and work with cross-functional teams to implement corrective actions.
- Drive continuous improvement of subsystem bringup and validation processes and methodologies, including automation, tool development, and documentation.
- Maintain up-to-date knowledge of the subsystem technology and industry trends.
Requirements
- In-depth knowledge of architecture, microarchitecture, and software interface of the subsystem.
- Experienced level knowledge C/C++ and Python.
- Relevant knowledge of verification methodologies, Verilog simulation, waveform viewers, and emulation.
- Experience in silicon debug for logic, software, and physical issues
- Strong ability to triage issues and develop environment and tools.
- Excellent skills in problem solving, written and verbal communication, excellent organization skills, and highly self-motivated.
- Ability to work well in a team and be productive under aggressive schedules.
Education & Experience
- PhD, Master’s Degree or Bachelor’s Degree with more than 5 years of experience in technical subject area.
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