The Silicon DDR Bring-up and Validation Engineer will be responsible for initiating and validating DDR subsystems within Rivos SOC designs. This role requires a strong understanding of advanced DDR design for server applications, encompassing physical design, logic, performance, system, and software aspects. Key responsibilities include generating tests, configuring test infrastructure, planning and executing bring-up procedures, and developing and implementing validation plans for DDR systems. The position is intended for technical lead or senior technical staff roles, involving leading an engineering team to design and execute DDR subsystem silicon bring-up plans, perform functional and performance tests, and ensure the subsystem meets product requirements. Collaboration with cross-functional teams, vendor engagement, issue debugging, root-cause analysis, sensitivity experiments for optimization, and continuous improvement of processes are also core duties.