Silicon Validation Engineer, Tensor Processing Unit, Google Cloud

10 Hours ago • 5 Years + • Research & Development

Job Summary

Job Description

This role involves post-silicon validation of Google Cloud Tensor Processing Units (TPUs). Responsibilities include creating test plans and content for AI/ML SoC subsystems, verifying on pre-silicon platforms, executing tests post-silicon, debugging issues, and collaborating with architecture, design, and software teams. The engineer will validate functional, power, performance, and electrical characteristics of TPUs to ensure high-quality designs for next-generation data center accelerators. This includes working with High Bandwidth Memory (HBM) post-silicon validation and hardware emulators, driving debugging efforts, and maintaining hardware emulation platforms for pre-silicon integration and validation. The goal is to contribute to cutting-edge TPU technology powering Google's AI/ML applications.
Must have:
  • Bachelor's degree in relevant field or equivalent experience
  • 5+ years HBM/DDR experience
  • Silicon bring-up, validation, and qualification experience
  • Experience with board schematics, layout, and debug
  • Test plan development and execution
  • Debugging and root cause analysis
Good to have:
  • Hardware emulation experience
  • Automation coding (Python)
  • RTL design, verification, or emulation experience
  • SoC architecture and boot flows knowledge
  • Knowledge of HBM/DDR standards

Job Details

Minimum qualifications:

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  • 5 years of experience in High Bandwidth Memory/Double Data Rate (HBM/DDR).
  • Experience in silicon bringup, functional validation, characterizing, and qualification.
  • Experience with board schematics, layout, and debug methodologies with using lab equipment.

Preferred qualifications:

  • Experience in hardware emulation with hardware/software integration.
  • Experience in coding (e.g., Python) for automation development.
  • Experience in Register-Transfer Level (RTL) design, verification or emulation.
  • Knowledge of SoC architecture including boot flows.
  • Knowledge of HBM/DDR standards.

About the job

In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

In this role, you will be responsible for post-silicon validation of the Cloud Tensor Processing Unit (TPU) projects. You will create test plans and test content for exercising the various subsystems in the Artificial Intelligence/Machine Learning (AI/ML) System on a Chip (SoC), verify the content on pre-silicon platforms, execute the tests on post-silicon platforms, and triage and debug issues. You will work with engineers from architecture, design, design verification, and software/firmware teams. You will be validating the functional, power, performance, and electrical characteristics of the Cloud Tensor Processing Unit (TPU) silicon to help deliver high-quality designs for next generation data center accelerators.The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.

We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Cloud’s Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.

Responsibilities

  • Develop and execute tests for memory controller High Bandwidth Memory (HBM) post-silicon validation and on hardware emulators and assist in bring-up processes from prototyping through post-silicon validation.
  • Drive debugging and investigation efforts to root-cause, cross-functional issues. This includes pre-silicon prototyping platforms as well as post-silicon bringup and production.
  • Ensure validation provides necessary functional coverage for skilled design.
  • Help operate and maintain our hardware emulation platform for pre-silicon integration and validation.

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