SoC Power/Performance Post-Si Validation & Emulation Engineer

• Collaborate with emulation power/performance architects to enhance the performance of emulation platforms.
• Work with IP teams to streamline RTL, ensuring compatibility, efficiency, and performance for various emulation platforms for power measurements.
• Perform power, thermal, and performance (Vmin/Fmax) measurements, correlation, debug, analysis, and characterization across different PVTs across various SoC IPs on emulation and post-silicon platforms.
• Collaborate with IP/Design Teams and power architects to define relevant power use-cases for SoC and various IPs.
• Develop and automate methodologies for emulation and validation flows, data collection, and analysis using Python or similar scripting languages.

• Education & Experience:
  • Required: Bachelor’s degree in Computer Engineering, Electrical Engineering, or a related field plus 8 years of experience.
  • Preferred: Master’s degree in Computer Engineering, Electrical Engineering, or a related field plus 6 years of experience.
• Required Skills:
  • Understanding of SoC Power Delivery Network architectures, Low Power Design Techniques for different market segment products including mobile, compute and datacenter.
  • Knowledge of electrical/Circuit properties related to on-die PDN, power/CLK gating, CLK Networks, System packages including chiplets and 3D ICs.
  • Experience with multiple SoC bring-ups, emulation builds of various complex Ips, debug tools, including JTAG and kernel debuggers.
  • Hands-on experience with one or more commercially available emulation platforms and deep familiarity with ASIC power estimation, analysis, and optimization, as well as industry-standard power estimation/analysis tools.
  • Solid foundational knowledge in Electronics and Electrical Engineering principles, VLSI concepts, digital/ASIC design, and packaging including chiplets
  • Excellent proficiency in Linux, programming, and scripting skills in Python, TCL, and C/C++.
  • Good written and oral communication skills, multitasking abilities, and understanding of deadline requirements. Ability to work independently with little supervision.

• Strong familiarity with Static Timing Analysis and Physical Design tools & methodology.
• Solid understanding of circuit and logic design and computer architecture fundamentals including CPU, GPU, DDR, NOC, Modem, etc.
• Ability to work with lab equipment, including logic analyzers and oscilloscopes.
• Demonstrated strong technical leadership skills

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