The ESD Engineer is responsible for developing I/O libraries, which includes designing, simulating, characterizing, and validating I/O pad libraries. The role also involves defining ESD methodology and specifying ESD requirements for chips and IP. The engineer will design ESD protection devices and circuits, develop test structures, and drive the development of design rules. They must have a holistic understanding of ESD/EOS protection for mixed-signal CMOS circuits, ensuring a comprehensive strategy. Responsibilities include designing and simulating I/O circuits and ESD structures, characterizing and modeling I/O libraries, and maintaining I/O libraries and models. This role requires a deep understanding of ESD and latch-up requirements and experience in chip-level ESD sign-off.