Verification Team Lead

7 Months ago • 10 Years + • Research & Development

Job Summary

Job Description

Ceragon Networks seeks a Verification Team Lead to manage a team responsible for verifying complex SoCs/FPGAs, networking, and modem designs. This role involves utilizing advanced verification methodologies and tools like SystemVerilog and UVM, developing verification environments from scratch, defining test and coverage plans, and working across various teams and disciplines. Responsibilities include managing the verification engineering team, ensuring the verification of various IPs and top-level designs, and defining and implementing the environment architecture. Experience with Specman is an advantage. The ideal candidate will possess strong leadership skills, a deep understanding of verification concepts, and experience with Networking IPs, Ethernet Switching, and SOCs.
Must have:
  • 10+ years SystemVerilog UVM verification experience
  • 2-4 years team management experience
  • Deep understanding of verification concepts
  • Experience developing verification environments
  • Networking IPs, Ethernet Switching, SOC knowledge
Good to have:
  • Specman experience
  • PCI-E, DDR4/5 memory controller experience

Job Details

About the job

Job Description

About Company:

Ceragon Networks ( https://www.ceragon.com/about-ceragon/ ) is a company that develops innovative equipment used in wireless data transmission among other software and service solutions. Our systems are based on microwave technology and serve as a cost-effective alternative to fibre optics.

Job : Verification Team Lead

Ceragon Networks is looking for a Verification Team Lead for an exciting Job in its complex SoC/FPGAs, Networking and Modem verification team.

Performing Verification in the most advanced verification methodologies/tools, implementing State of the Art verification for complex ASIC.

We are looking for talented Verification Team Lead which have abilities to own complex tasks on one hand and on the other hand be a team player, working with different vertical team and disciplines.

  • Responsible for managing verification engineering team
  • Responsible for the Verification of Various IPs and top-level designs.
  • Defining and implementing the Environment architecture.
  • Defining and implementing Test plans, coverage plans, etc

Job Requirements

  • At least 10 years’ experience with system Verilog UVM based verification with 2-4 years in team management
  • Experience with Specman (Advantage)
  • Deep understanding of verification concepts and advanced methodologies
  • Experience developing verification environments from scratch
  • Background in Networking Ips, Ethernet Switching, SOC desired
  • Understanding of verification and design practices
  • Experience with PCI-E, DDR4/5 memory controllers (Advantage)
  • Team player
  • Dynamic person
  • Hands on experience in ASIC verification
  • Fast Learner
  • Education: BS/BE/BTech/MS/ME/MTech or equivalent

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