Qualcomm is seeking a Senior WLAN PHY Baseband (RTL) Digital Design Engineer with 2-6 years of experience in micro-architecting and developing complex IPs. Must have proficiency in Verilog RTL coding, uArch, CDC check, PLDRC, Timing constraints, Python/Perl, and experience in designing/debugging complex data-path/control-path IPs. Strong communication, analytical, and leadership skills are essential.