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JMA is a U.S. leader in wireless technology, developing advanced software-based 5G platforms in Syracuse, NY. The company provides 5G solutions globally for critical connectivity demands. This role, Advanced Engineer, QA, involves designing and deploying 5G SA, NSA, and LTE networks, developing and executing test plans for Baseband Unit (BBU) software and hardware, integrating BBU components into telecommunication systems, providing technical support, and optimizing BBU performance.

IT Help Desk Team Lead

<p class="my-4 text-gray-700 leading-relaxed">JMA is restoring U.S. leadership in wireless technology at a critical time in the transition to 5G. It makes the world’s most advanced software-based 5G platform, designed, coded, and manufactured in Syracuse, NY at the only U.S.-owned 5G factory in the country.</p><p class="my-4 text-gray-700 leading-relaxed">Across its global tech centers, JMA makes 5G possible for organizations with the most critical connectivity demands in the world. JMA’s technology is ushering in a new era of connectivity for leading mobile carriers, the most iconic stadiums, major universities, leading healthcare centers, the busiest transit centers, and the U.S. Military.</p><p class="my-4 text-gray-700 leading-relaxed">5G is more than another G on your phone — it is a generational opportunity to change the way the world operates. Join the industry’s fastest growing technology company to shape that future today.</p><h3 class="text-xl md:text-2xl font-bold mt-8 mb-3 text-gray-800">Job Duties:</h3><ul class="list-disc list-inside my-5 pl-5 space-y-2 text-gray-700"><li class="leading-relaxed">Design and deploy end-to-end network for 5G SA, NSA and LTE cell setups. Develop and execute test plans, test cases, and test scripts for Baseband Unit (BBU) software and hardware components, including functional, regression, and performance testing, identifying, reporting, and resolving defects while collaborating with other teams.</li><li class="leading-relaxed">Integrate BBU components into larger telecommunication systems or networks by collaborating with system architects and engineers to ensure seamless integration of BBUs with other network elements, system-level testing to validate end-to-end functionality.</li><li class="leading-relaxed">Provide technical support to customers, field engineers and internal teams on BBU-related issues.</li><li class="leading-relaxed">Analyze and optimize the performance of BBU and related systems through performance testing, implementing performance enhancements, and monitoring system performance in real-time to implement tuning strategies and optimize resource utilization.</li></ul><h3 class="text-xl md:text-2xl font-bold mt-8 mb-3 text-gray-800">Requirements:</h3><ul class="list-disc list-inside my-5 pl-5 space-y-2 text-gray-700"><li class="leading-relaxed">Master’s Degree in Electrical or Electronics Engineering, plus 2 years of experience in the position offered or a Test Engineer position or Bachelor’s Degree in Electrical or Electronics Engineering, plus 5 years of post-Bachelor’s progressive experience in the position offered or a Test Engineer position.</li><li class="leading-relaxed">All of the required experience must have included: designing, developing, and executing test cases for wireless products including with 4G and 5G systems, and 4G/5G UE simulators; applying knowledge of LTE and 5G specifications and baseband, core and network configuration and testing, and communication protocol from EMS to RAN; and using/working with Linux, Python scripting, Jira, Confluence, EMS/NMS and KPI, Kubernetes, and cloud-based RAN system. #LI-DNI</li></ul><p class="my-4 text-gray-700 leading-relaxed">At JMA, our people are deeply committed to their work and we provide benefits to match. When you join JMA you have immediate access to everything you need. Whether you're looking for employee discounts, financial, legal and/or childcare resources and support, we have you covered. We believe in providing comprehensive health and wellness coverage along with monetary rewards towards health goals, in addition to numerous company-provided personal protection benefits at no additional cost to you.</p><p class="my-4 text-gray-700 leading-relaxed">At JMA, we don’t just accept differences — we embrace them. JMA is proud to be an equal opportunity workplace. We do not discriminate based upon race, religion, color, national origin, gender (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristic.</p>

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We are seeking a highly experienced Senior Physical Design Technical Lead to drive backend implementation of advanced Intel wireless products. This role involves defining and improving design implementation flows, automation, and signoff methodologies. You will technically lead physical design for complex VLSI chips, ensuring high performance and reliability. Responsibilities include optimizing power, performance, and area (PPA) metrics, resolving design issues (Place and Route, timing, power, signal integrity), and collaborating with other Intel design teams. You will also mentor junior engineers and stay updated with industry advancements.

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<h2 class="text-2xl md:text-3xl font-bold mt-10 mb-4 border-b pb-2 text-gray-800">Job Description:</h2><p class="my-4 text-gray-700 leading-relaxed">We are seeking for a highly experienced and motivated Senior Physical Design Technical Lead to join our group and lead and drive backend implementation of advanced Intel wireless products. As part of your job you will define and improve design implementation flows, automation and signoff methodologies. Technically Lead the physical design flow and implementation activities for complex VLSI chips, ensuring high performance and reliability. Optimize power, performance, and area (PPA) metrics through advanced techniques and tools. Analyze and resolve design issues related to Place and Route, timing, power, signal integrity, and manufacturability. Collaborate with other Intel design teams to ensure seamless integration and optimization of design specifications. Mentor and guide junior engineers, providing technical expertise and support. Interface with EDA vendors to evaluate and integrate new tools and technologies and stay updated with the latest industry trends and advancements in VLSI Physical design.</p><h2 class="text-2xl md:text-3xl font-bold mt-10 mb-4 border-b pb-2 text-gray-800">Qualifications:</h2><ul class="list-disc list-inside my-5 pl-5 space-y-2 text-gray-700"><li class="leading-relaxed">BSc/MSc in electrical or computer engineering.</li><li class="leading-relaxed">10+ years of hands-on experience in VLSI physical design, with a proven track record of successful projects working with advanced technology nodes.</li><li class="leading-relaxed">Excellent familiarity with all Physical Design implementation flows and techniques, including floorplanning, placement, routing, and timing closure.</li><li class="leading-relaxed">Proficiency in Synopsys EDA tools (Cadence is an advantage).</li><li class="leading-relaxed">Knowledge of scripting languages such as Python, Perl, or TCL.</li><li class="leading-relaxed">Strong understanding of STA, IR drop, EM analysis, DRC/LVS, and ECO flows. Experience with power, performance, and area (PPA) optimization.</li><li class="leading-relaxed">Experience in managing and mentoring technical teams.</li><li class="leading-relaxed">Excellent problem-solving skills and attention to detail. Strong communication and teamwork skills</li></ul><h2 class="text-2xl md:text-3xl font-bold mt-10 mb-4 border-b pb-2 text-gray-800">Job Type:</h2><p class="my-4 text-gray-700 leading-relaxed">Experienced Hire</p><h2 class="text-2xl md:text-3xl font-bold mt-10 mb-4 border-b pb-2 text-gray-800">Shift:</h2><p class="my-4 text-gray-700 leading-relaxed">Shift 1 (Israel)</p><h2 class="text-2xl md:text-3xl font-bold mt-10 mb-4 border-b pb-2 text-gray-800">Primary Location:</h2><p class="my-4 text-gray-700 leading-relaxed">Israel, Petah-Tikva</p><h2 class="text-2xl md:text-3xl font-bold mt-10 mb-4 border-b pb-2 text-gray-800">Additional Locations:</h2><h2 class="text-2xl md:text-3xl font-bold mt-10 mb-4 border-b pb-2 text-gray-800">Business group:</h2><p class="my-4 text-gray-700 leading-relaxed">The Silicon Engineering Group (SIG) is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs from architecture to manufacturing readiness that power Intel’s leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.</p><h2 class="text-2xl md:text-3xl font-bold mt-10 mb-4 border-b pb-2 text-gray-800">Posting Statement:</h2><p class="my-4 text-gray-700 leading-relaxed">All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.</p><h2 class="text-2xl md:text-3xl font-bold mt-10 mb-4 border-b pb-2 text-gray-800">Position of Trust</h2><p class="my-4 text-gray-700 leading-relaxed">N/A</p><h2 class="text-2xl md:text-3xl font-bold mt-10 mb-4 border-b pb-2 text-gray-800">Work Model for this Role</h2><p class="my-4 text-gray-700 leading-relaxed">This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.</p>

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This assessment gives us an idea of your C++ skills- Companies that evaluate this skillset in interviews: Rockstar Games, Ubisoft, Mayhem Studios, etc.- 10 Multiple Choice questions- Average time to complete: 7 to 10 minutes

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