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Analog Design Engineer, Senior Staff

Lombardy, Italy (On-site)

Analog Design Engineer, Senior Staff

1 Month ago • 3-6 Years • Research & Development

About the job

2 skills required for this role

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level-design

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Job Description

Marvell's Central Engineering – Optical PHY team seeks a Senior Staff Analog Design Engineer. Responsibilities include analyzing block specifications, selecting topologies, designing analog blocks at the transistor level, supervising layout, performing post-layout verifications, block modeling/validation, and collaborating with other teams. The ideal candidate will have a Master's or PhD in Electrical Engineering and 3-6 years of experience in IC design, from architecture to lab characterization. Experience with multi-GHz analog design, custom layout, EDA tools, and IC performance measurement/debugging is crucial. Experience with Multi-Gbps SerDes or electro-optical transceivers and advanced CMOS nodes is a plus.

Must have:

Master's/PhD in Electrical Engineering
3-6 years of IC design experience
Multi-GHz analog design experience
Custom layout experience
EDA tool proficiency
IC performance measurement/debugging

Good to have:

Multi-Gbps SerDes or electro-optical transceiver experience
Advanced CMOS node experience

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About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

Central Engineering – The Optical PHY (CE-OPHY) team designs high-speed and optical transceivers for communication infrastructure in long-haul, metro, and data centers. We address the bandwidth, capacity, and power issues faced by cloud computing and mega data centers that power the social media giant platforms. Our innovative approaches have resulted in the company’s products being first to market in many key areas, developing the most advanced chips and subsystem solutions to address the ever-increasing demand for higher data rates driven by video-on-demand, gaming, and other real-time data streams.

What You Can Expect

Analysis of block specifications and selection of the appropriate topology.
Transistor-level design of analog blocks.
Supervised layout activities, provided guidelines, and ran post-layout verifications.
Block modeling and/or model validation.
Cooperation with other teams to improve existing solutions.

What We're Looking For

Master’s degree and/or PhD in Electrical Engineering or related fields with 3-6 years of work experience.
Proven experience in designing ICs from architecture definition to lab characterization.
Solid experience in analog design, preferably in the multi-GHz range.
Experience in performing or supervising analog custom layout
Usage of EDA CAD tools.
Measuring IC performance and debugging the design to correlate simulations to measurements.
Direct project experience in at least one of the following areas is a plus: Multi-Gbps electrical SerDes or electro-optical transceivers; advanced CMOS nodes, including FinFET.
Strong communication, presentation, and documentation skills.
Excellent written and spoken English.

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

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