Developer Operations Engineer, CPU Design Verification
5 Months ago • 5 Years + • $156,000 PA - $229,000 PA
Research Development
Job Description
This role involves developing and deploying tools and infrastructure to enhance the productivity of Google's CPU design verification team. Responsibilities include managing large-scale regression flows for simulation, emulation, and FPGA platforms, including automated test generation. The position requires developing and utilizing databases for verification metrics and evaluating/integrating EDA tools into verification flows. Continuous improvement of verification flows is a key objective. The ideal candidate will have experience with verification flow infrastructure, CAD, Python/Perl scripting, and simulation tools like Cadence IES/Xcelium, Synopsys VCS, or Mentor Questa. Experience with EDA tools, emulation/FPGA, databases (SQL/Oracle), and interfacing with CAD/IT teams is preferred. This is a full-time position with a competitive salary and benefits package.
Good To Have:
- Master's/PhD in relevant field
- Experience with simulation tools (Cadence, Synopsys, Mentor)
- Experience with emulation/FPGA
- SQL/Oracle database experience
- Experience with compute farm management
Must Have:
- Bachelor's degree in relevant field
- 5+ years verification flow/CAD experience
- Python/Perl scripting
- Develop and manage regression flows
- Database experience for verification metrics
- EDA tool integration and evaluation
Perks:
- Bonus
- Equity
- Benefits
Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 5 years of experience with verification flow infrastructure or CAD.
- Experience with Python or Perl scripting languages.
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
- Experience with simulation tools such as Cadence IES/Xcelium, Synopsys VCS, or Mentor Questa.
- Experience with simulation regression and compute farm management flows/tools.
- Experience with major vendor Electronic design automation (EDA) tools/flows as well as emulation/ Field Programmable Gate Array (FPGA).
- Experience with databases such as SQL or Oracle and interfacing with both CAD and IT teams.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.The US base salary range for this full-time position is $156,000-$229,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about .
Responsibilities
- Develop and deploy tools and infrastructure to increase productivity of the Verification team.
- Develop and manage large-scale regression flows for simulation, emulation, FPGA platforms, including automated test generation.
- Assist in development and use of databases for various key information of verification metrics including fail signatures, pass/fail rates, simulator performance, etc.
- Evaluate, benchmark, and integrate Electronic Design Automation (EDA) tools into our verification flows.
- Show continuous improvement to our verification flows.
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