FPGA Design Engineer

2 Months ago • 2-5 Years • Research & Development

About the job

Job Description

FPGA Design Engineer with Xilinx FPGAs, VHDL, Vivado, Libero SoC, Questasim, communication protocols (1553B, RS422, RS232, serial, parallel). Implement communication protocols, optimize performance, and collaborate with cross-functional teams.
Must have:
  • Xilinx FPGAs
  • HDL design
  • Vivado, Libero
  • Questasim
Good to have:
  • 1553B, RS422
  • RS232 protocols
  • Timing analysis
  • ARINC 429
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About the job

Job description

Company Description:

ACL-Apollo Computing Laboratories (P) Ltd. is a leading manufacturer of high-quality electronic systems specializing in embedded computing. Established in 1992 in Hyderabad, we focus on engineering and quality assurance to achieve excellence. Our in-house developed products are qualified for military standards and widely used in defense and aerospace. Join us in revolutionizing the embedded computing landscape with innovative solutions that exceed expectations.


Role Description:

We are looking for an FPGA Design Engineer to design and develop FPGA-based solutions using VHDL. You will work with Xilinx FPGA platforms, utilizing tools such as Vivado, Libero SoC, and Questasim to create and verify complex digital designs. Your role will involve implementing communication protocols (1553B, RS422, RS232, serial, parallel and other protocols), optimizing performance, and collaborating with cross-functional teams to ensure seamless integration and functionality.


Qualifications:

  • Bachelor’s degree in Electrical or Computer Engineering (Masters preferred).
  • Proven experience with Xilinx FPGAs and HDL design.
  • Proficiency with Vivado, Libero SoC, and Questasim.
  • Strong understanding of communication protocols and timing analysis.
  • Experience in 1553B, RS422, RS232, ARINC 429 or AFDX protocols are a major plus
  • Strong problem-solving and analytical skills
  • Excellent communication and teamwork abilities
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About The Company

Telangana, India (On-Site)

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