Lead Software Engineer, Synthesis

2 Months ago • All levels • Research & Development

About the job

Job Description

Cadence is looking for a Lead Software Engineer with expertise in logic synthesis, timing analysis, and RTL. You'll design, implement, and validate innovative algorithms, analyze benchmark designs, and provide R&D support. Strong C/C++ skills and experience with UNIX/LINUX are essential.
Must have:
  • C/C++ Proficiency
  • Logic Synthesis
  • Timing Analysis
  • RTL Knowledge
Good to have:
  • UNIX/LINUX
  • Tcl Knowledge
  • Large Projects
  • Timing Analysis
Perks:
  • 401k Matching
  • Stock Purchase
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At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Cadence Design Systems is looking for a highly motivated software engineer to work as a member of the R&D staff on Cadence’s Genus Synthesis Solution product.  Genus is a complete product that encompasses logic synthesis and physical design.  The product breadth means we are looking for skilled and motivated candidates with backgrounds in logic synthesis, word-level synthesis, static timing analysis, computer architecture, verification, RTL compilation, placement, power analysis, routing, extraction, and optimization.  You will be part of a team responsible for creating the innovative technologies required for technology leadership in this space. Development responsibilities include designing, developing, troubleshooting, debugging and supporting the Genus software product. 

Come join our experienced team of outstanding software developers!

Job Responsibilities:

The role’s day to day responsibilities cover:

  • Design, implementation and validation of new innovative synthesis optimization algorithms to improve the timing, area, and power design metrics. Validation and analysis of these on benchmark designs to measure achieved improvements.
  • R&D support of application and product engineers for customer problems and requests. This consists of problem analysis, debugging and fixing, or the development of new features and enhancements to improve synthesis results with respect to timing, area and power.

Job Qualifications:

• MSc / PhD in Computer Science, Electrical, Mathematics or related field

Required Skills

The successful candidate will possess the following combination of education and experience:

  • Proficient in C/C++
  • Excellent programming and software engineering skills
  • Experience with UNIX and/or LINUX platforms is preferred
  • RTL knowledge – System Verilog, VHDL is preferred
  • Strong knowledge of Tcl is preferred
  • Prior experience with large software development projects is highly recommended
  • Prior experience with timing analysis software development projects is highly recommended

The annual salary range for California is $110,600 to $205,400. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

We’re doing work that matters. Help us solve what others can’t.

View Full Job Description
$110.6K - $205.4K/yr (Outscal est.)
$158.0K/yr avg.
San Jose, California, United States

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About The Company

Yokohama, Kanagawa, Japan (On-Site)

Feldkirchen, Bavaria, Germany (Hybrid)

San Jose, California, United States (On-Site)

San Jose, California, United States (On-Site)

Burlington, Massachusetts, United States (On-Site)

Katowice, Silesian Voivodeship, Poland (On-Site)

San Jose, California, United States (On-Site)

San Jose, California, United States (On-Site)

San Jose, California, United States (On-Site)

Bengaluru, Karnataka, India (On-Site)

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