Logic Equivalence Check (LEC) Engineer
11 Months ago • 5-8 Years
Software Development & Engineering
Job Description
Join a cutting-edge and well-funded hardware startup in Silicon Valley as a PD/CAD Engineer. The mission is to reimagine silicon and create computing platforms that will transform the industry with advanced technologies. This role offers the opportunity to work with talented engineers to create designs that push the envelope on performance, energy efficiency, and scalability. Responsibilities include building and automating the formal verification flow and supporting multiple design teams to consolidate resolutions. The company offers a fun, creative, and flexible work environment.
Good To Have:
- Experience with Conformal ECO/Formality ECO
- Experience with Conformal Lowpower/VCLP
- Experience with Low Power implementation flows (UPF)
- Experience with Physical Synthesis/PNR
- Experience with DFT implementation
Must Have:
- Develop and improve logical equivalence check flow
- Experience with ABORT/NEQ debugging
- Experience with LEC tools (Conformal/Formality)
- Collaborate with tool vendors
- Collaborate with RTL/PD/DFT teams
- Develop and maintain in-house CAD tools
- Proficient in TCL, Python, Perl
Perks:
- Fun work environment
- Creative work environment
- Flexible work environment
Join a cutting-edge and well-funded hardware startup in Silicon Valley as a PD/CAD Engineer. Our mission is to reimagine silicon and create computing platforms that will transform the industry with the most advanced technologies. You will have the opportunity to work with some of the most talented and passionate engineers in the world to create designs that push the envelope on performance, energy efficiency and scalability. We offer a fun, creative and flexible work environment, with a shared vision to build products to change the world. You will be responsible for building and automating formal verification flow and also support multiple design teams to consolidate resolutions.
Qualifications
- Develop and improve existing flow for logical equivalent check
- Experience with ABORT/NEQ debugging process
- Experience with logical equivalence tools such as Conformal LEC and/or Formality
- Collaborate with tool venders for tool issues debugging and resolving
- Collaborate with cross-functional RTL/PD/DFT teams to come up with custom solutions
- Developing and maintaining in-house CAD tools and flow
- Experience with Conformal ECO/Formality ECO is a plus
- Experience with Conformal Lowpower/VCLP is a plus
- Experience with Low Power implementation flows (UPF) is a plus
- Experience with Physical Synthesis/PNR and also DFT implementation is a plus
- Proficient in programming languages, TCL, Python, Perl
Education & Experience
- BS (preferred in EE) plus 8 years
- MS (preferred in EE) plus 5 years
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