Post-Silicon Power Engineer

rivos

| Santa Clara, California, United States (Hybrid) | Full Time | 19 months ago

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Job Summary

As a Post-Silicon Power Engineer, you will engage in power hardware validation and analysis of typical workloads on server compute silicon. Your responsibilities include analyzing workloads and their power dissipation to drive power optimization for a superior power/performance ratio. You will measure silicon power dissipation for server workloads like data analytics, graph algorithms, and AI/ML, analyze the data, and correlate measurements with simulations. Collaboration with design, architecture, systems, and software teams is key to enable enterprise customer use-case power measurements. You will also perform silicon power measurements, correlate with simulations, and tune hardware and software settings to improve the use-case power/performance ratio. Silicon register tuning for power and thermal stability, automation of power measurement infrastructure, and system-level power & performance debug are also part of the role.

Must Have

Analyze workloads and power dissipation
Measure silicon power dissipation
Correlate measurements with simulation
Collaborate cross-functionally
Silicon register tuning
Automate power measurement
Assembly, C, Python, shell programming
Use lab equipment
CMOS power calculation

Good to Have

Problem solving skills
Written and verbal communication
Organizational skills
Self-motivated
Team player

Job Description

Rivos Power Design team is seeking highly motivated candidates to perform post-silicon power activities for the new high performance power efficient SOC designs.The primary role is to engage in power hardware validation and analysis of typical workloads on server compute silicon.

Responsibilities

As a Post-Silicon Power Engineer, you will own or participate in the following:
Analyze workloads and their power dissipation to drive the power optimization to achieve best-in-class power/performance ratio
Measure silicon power dissipation of typical server workloads (data analytics, graph algorithms, and AI/ML), analyze data, and correlate measurements with simulation results
Collaborate cross-functionally with design, architecture, systems, and software teams to enable enterprise customer use-case power measurements
Perform silicon power measurements and correlate with partition simulations and full-chip projections
Improve use-case power/perf ratio through tuning of hardware and software settings
Silicon register tuning to achieve power and thermal stability
Automate power measurement infrastructure
System level power & performance debug.

Requirements

Applicants with strong programming skills and understanding of low-power digital design and power fundamentals, including:
Skilled in Assembly, C, Python, and shell programming plus associated tool chains
Use of lab equipment such as multi-meter units, oscilloscopes, etc
CMOS dynamic and static power calculation
Excellent skills in problem solving, written and verbal communication, excellent organization skills, and highly self-motivated.
Ability to work well in a team and be productive under aggressive schedules.