RTL Design Verification
Job Summary
Job Description
Seeking an experienced RTL Design Verification Engineer with expertise in Verilog/SystemVerilog, UVM, and ASIC design flow. Proven ability in functional and performance verification, along with strong problem-solving skills. Experience with formal verification tools and methodologies is a plus.
Must have:
- RTL Design Verification
- Verilog/SystemVerilog
- UVM Methodology
- ASIC Design Flow
Good to have:
- Formal Verification
- Scripting Languages
- Industry Protocols
- Python/Perl
Perks:
- Career Advancement
- Collaborative Culture
4 skills required
Job Details
About the job
𝐉𝐨𝐢𝐧 𝐎𝐮𝐫 𝐓𝐞𝐚𝐦 𝐚𝐬 𝐚𝐧 𝐑𝐓𝐋 𝐃𝐞𝐬𝐢𝐠𝐧 𝐕𝐞𝐫𝐢𝐟𝐢𝐜𝐚𝐭𝐢𝐨𝐧 𝐄𝐧𝐠𝐢𝐧𝐞𝐞𝐫! at ARF Design
Are you passionate about RTL Design verification We're seeking a talented engineer to join our team and contribute to the semiconductor industry.
𝐏𝐨𝐬𝐢𝐭𝐢𝐨𝐧: RTL Design verification Engineer
𝐄𝐱𝐩𝐞𝐫𝐢𝐞𝐧𝐜𝐞: 5-10 Years
𝐋𝐨𝐜𝐚𝐭𝐢𝐨𝐧: #Bangalore #Bhubaneswar #hyderabad
𝐑𝐞𝐬𝐩𝐨𝐧𝐬𝐢𝐛𝐢𝐥𝐢𝐭𝐢𝐞𝐬::
Bachelor's or master's degree in electrical engineering/Electronics & Communication Engineering or related field.
𝐏𝐫𝐢𝐦𝐚𝐫𝐲 𝐑𝐞𝐪𝐮𝐢𝐫𝐞𝐦𝐞𝐧𝐭𝐬::
If you're ready to take your career to the next level and contribute to groundbreaking projects, we want to hear from you!
𝐏𝐥𝐞𝐚𝐬𝐞 𝐬𝐮𝐛𝐦𝐢𝐭 𝐲𝐨𝐮𝐫 𝐫𝐞𝐬𝐮𝐦𝐞/𝐂𝐕 𝐭𝐨 poojakarve@arf-design.com
𝐍𝐨𝐭𝐞: Please name the file in the following format: Your Full
𝐍𝐚𝐦𝐞_ 𝐃𝐞𝐬𝐢𝐠𝐧𝐚𝐭𝐢𝐨𝐧_ 𝐄𝐱𝐩𝐞𝐫𝐢𝐞𝐧𝐜𝐞.
Skills: design,rtl design,design verification testing,.com,universal verification methodology (uvm),verilog,systemverilog
Are you passionate about RTL Design verification We're seeking a talented engineer to join our team and contribute to the semiconductor industry.
𝐏𝐨𝐬𝐢𝐭𝐢𝐨𝐧: RTL Design verification Engineer
𝐄𝐱𝐩𝐞𝐫𝐢𝐞𝐧𝐜𝐞: 5-10 Years
𝐋𝐨𝐜𝐚𝐭𝐢𝐨𝐧: #Bangalore #Bhubaneswar #hyderabad
𝐑𝐞𝐬𝐩𝐨𝐧𝐬𝐢𝐛𝐢𝐥𝐢𝐭𝐢𝐞𝐬::
- Develop and execute verification plans for complex RTL designs.
- Perform functional and performance verification of design blocks.
- Collaborate with cross-functional teams to ensure successful IP component integration.
- Contribute to enhancing verification methodologies and best practices.
Bachelor's or master's degree in electrical engineering/Electronics & Communication Engineering or related field.
𝐏𝐫𝐢𝐦𝐚𝐫𝐲 𝐑𝐞𝐪𝐮𝐢𝐫𝐞𝐦𝐞𝐧𝐭𝐬::
- Minimum of 3+ years of experience in RTL design verification.
- Proficiency in Verilog/ SystemVerilog and experience with industry-standard verification methodologies (OVM/UVM).
- Strong understanding of ASIC design flow and verification techniques.
- Excellent problem-solving and debugging skills.
- Experience with formal verification tools and methodologies.
- Familiarity with scripting languages (e.g., Python, Perl) for automation tasks.
- Knowledge of industry-standard protocols and interfaces (e.g., PCIe, AXI, AHB).
- Opportunities for professional growth and career advancement.
- Vibrant and inclusive work culture that values collaboration and innovation.
If you're ready to take your career to the next level and contribute to groundbreaking projects, we want to hear from you!
𝐏𝐥𝐞𝐚𝐬𝐞 𝐬𝐮𝐛𝐦𝐢𝐭 𝐲𝐨𝐮𝐫 𝐫𝐞𝐬𝐮𝐦𝐞/𝐂𝐕 𝐭𝐨 poojakarve@arf-design.com
𝐍𝐨𝐭𝐞: Please name the file in the following format: Your Full
𝐍𝐚𝐦𝐞_ 𝐃𝐞𝐬𝐢𝐠𝐧𝐚𝐭𝐢𝐨𝐧_ 𝐄𝐱𝐩𝐞𝐫𝐢𝐞𝐧𝐜𝐞.
Skills: design,rtl design,design verification testing,.com,universal verification methodology (uvm),verilog,systemverilog
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