Senior Physical Design Verification Layout Engineer

NVIDIA is looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

• Responsible for chip floorplan and pins placement

• Running, debugging and approve Physical verification flows across multiple projects

• Perform physical layout planning and optimization

What we need to see:

• B.SC./ M.SC. in Electrical Engineering

• At least 5+ years of hands-on layout design experience

• Strong background of Physical Design Verification methodology LVS/DRC

• Knowledge in physical design flows and methodologies (PNR, STA, physical verification)

• Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc..)

• Great teammate

NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking individuals in the world working for us. If you're creative and autonomous, we want to hear from you! NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.