Senior Staff Engineer – PCIe Verification

11 Hours ago • 12 Years +

Job Summary

Job Description

The Senior Staff Engineer will be responsible for verifying IP, Block, or Subsystem at the SoC level, generating documentation, and analyzing/debugging given blocks/tasks in verification. The role involves developing verification environments and components, reporting to the Lead Engineer. The company is looking for someone with extensive experience in digital verification, including constrained random verification, functional coverage, and assertions, and a deep understanding of System Verilog, Verilog, and OVM/UVM methodology. The role offers a flexible work environment and a comprehensive benefits package.

Must have:

12+ years of experience with a degree in Electrical/Electronics/Computer Engineering.
Good understanding of verification flow, challenges, and functional verification requirements.
Experience with IP, Block, or SoC level functional verification.
Expertise in digital verification aspects (constrained random, functional/code coverage, assertions).
Expert in System Verilog, Verilog, and OVM/UVM verification methodology.
Working experience on AMBA (AXI, AHB, APB) and CHI protocols.
Knowledge of Verilog/System Verilog, digital simulation, and debugging.

Good to have:

Hands-on experience with PCIe/CXL/HBM 2/2E/HBM3 protocols.
Experience with Perl, Python, or similar scripting languages.

Perks:

Competitive Compensation Package
Restricted Stock Units (RSUs)
Provisions for advanced education
Medical Insurance and Wellness Benefits
Educational Assistance
Advance Loan Assistance
Office lunch & Snacks Facility

6 skills required

6 skills required for this role

Add these skills to join the top 1% applicants for this job

python

perl

innovation

networking

talent-acquisition

problem-solving

Job Details

The Opportunity
We're looking for the Wavemakers of tomorrow.

Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology.

What You'll Do

Will be responsible for verification of IP, Block, or Subsystem at Soc Level.
Generate appropriate documentation for verification.
Responsible for analyzing/debugging given blocks/tasks in verification.
Should be able to develop own verification environment, verification components developed.
You will report to Lead Engineer.

What You'll Need:

12+ years of experience with a Bachelors'/ Master's degree in the field of Electrical, Electronics, or computer engineering
Should have a good understanding of verification flow, challenges, and requirements of functional verification.
Have worked on IP level or Block level or SoC level functional verification.
Experience with digital verification aspects such as constrained random verification, functional coverage, code coverage, assertions, methodology & philosophy.
Expert in System Verilog, Verilog, and OVM/UVM verification methodology.
Have working experience on AMBA interface protocols (AXI, AHB, APB) and CHI protocol.
Knowledge of Verilog/System Verilog, digital simulation, and debugging is a must.
Hands-on experience working with the following protocols is desired – PCIe/CXL/HBM 2/2E/HBM3.
Experience with Perl, Python or similar scripting languages will be helpful.
Ability to adapt & learn, quickly and willingness to proactively take on responsibilities beyond the job description to accomplish team goals.

"We have a flexible work environment to support and help employees thrive in personal and professional capacities"

As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes:

Competitive Compensation Package
Restricted Stock Units (RSUs)
Provisions to pursue advanced education from Premium Institute, eLearning content providers
Medical Insurance and a cohort of Wellness Benefits
Educational Assistance
Advance Loan Assistance
Office lunch & Snacks Facility

Equal Employment Opportunity Statement

Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process.