SoC DRAM Memory Subsystem Validation Engineering Program Manager

1 Month ago • All levels • Software Development & Engineering • $157,000 PA - $278,900 PA

Job Summary

Job Description

Apple is seeking a SoC DRAM Memory Subsystem Validation and Debug Program Manager to drive memory subsystem readiness for custom SoCs. This role involves managing bring-up, validation, and debugging of high-bandwidth multi-client memory subsystems. The program manager will also contribute to the DRAM industry's mobile roadmap and drive innovative DRAM technologies. Key responsibilities include interfacing with Design, Verification, Silicon Validation, Productization, System Hardware and Software teams, driving debug activities, planning DRAM technology adoption, and collaborating with various engineering and supply management groups to ensure high-quality silicon execution and meet specifications and schedules.
Must have:
  • Interface with multi-functional teams for memory issues
  • Drive post-silicon debug and root-cause problems
  • Plan and lead DRAM technology adoption
  • Collaborate with vendors on new DRAM development
  • Ensure high-quality silicon execution
Good to have:
  • Craft DRAM industry mobile roadmap
  • Drive innovative DRAM technologies
  • Work with DRAM Global Supply Management
  • Collaborate with Design for Test (DFT)

Job Details

Come and join the team that crafts Apple's groundbreaking silicon. Apple makes the greatest SoCs in the world; to do that takes thousands of employees, multiple years and very significant R&D spending. To make the best use of those employees, time, and money requires excellent methodologies and structures. As we continue to expand and mature, the processes used to develop these SOCs must be improved. Join us to do your life’s best work in this rare opportunity to help define the next big thing that will surprise and delight the world! The SoC DRAM Memory Subsystem Validation and Debug Program Manager will drive the memory subsystem readiness for our custom SoCs. Our high-bandwidth multi-client memory subsystems are blazing new territory with every generation. The charter will include managing bring-up, validation, and the complicated debug of our groundbreaking memory subsystem. The EPM will also help craft the DRAM industry’s mobile roadmap and drive innovative DRAM technologies to accompany SoC’s across Apple’s product lines. In this multifaceted role, you will be the critical interface between Apple’s DRAM architecture, Memory Controller Design and DV, DDR PHY, DRAM product engineering and software teams to ensure these sophisticated memory technologies are delivered from architecture to mass production to Apple’s industry leading quality standards.
- Interface and drive memory related silicon issues across multi-functional teams: Design, Verification, Silicon Validation, Productization, System Hardware and Software. - Drive debug activities in post silicon environments, root-cause problems and steer the team to the best corrective action to move forward. - Plan and lead adoption of DRAM technologies, custom package development and qualification process with multi-functional teams. - Work closely with the DRAM Global Supply Management (GSM), DRAM & Package Engineering and SoC Program Management organizations to set priorities. - Attend and drive technical sessions with DRAM vendors on new DRAM technology development to track and follow-up issues/action items and drive vendors to meet spec and schedule requirements. - Work with DRAM GSM and silicon material management teams to plan and track distribution of new DRAM material across all systems in development. - Enable tight collaboration between Design for Test (DFT), Product/Test/QA engineering, SiVal and Systems teams during NPI to finalize SoC performance targets and screen requirements. - Drive internal program process to guarantee high quality silicon execution.

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