SOC Static Timing Analysis Engineer

Join a cutting-edge and well-funded hardware startup in Silicon Valley as a Silicon STA Engineer. Our mission is to reimagine silicon and create Risc-V based computing platforms that will transform the industry. You will have the opportunity to work with some of the most talented and passionate engineers in the world to create designs that push the envelope on performance, energy efficiency and scalability. We offer a fun, creative and flexible work environment, with a shared vision to build products to change the world. Responsibilities include block level and/or full chip timing analysis, developing timing methodology and infrastructure, generating timing constraints, defining analysis scenarios, developing signoff methodology, and partnering with physical design teams.