Sr Principal Verification Engineer, ASIC Engineering

Description

Enphase Energy is a global energy technology company and a leading provider of solar, battery, and electric vehicle charging products. Founded in 2006, our innovative microinverter technology revolutionized solar power, making it a safer, more reliable, and scalable energy source. Today, the Enphase Energy System enables users to make, use, save, and sell their own power. Enphase is also one of the most successful and innovative clean energy companies in the world, with more than 80 million products shipped across 160 countries.

Join our dynamic teams designing and developing next-gen energy technologies and help drive a sustainable future!

Enphase is looking for experienced SoC Verification engineer to join our team in Bangalore India. The team is working on next generation Control ASIC in 22nm technology. This ASIC uses the ARM CM4 core, so experience with that core is a must. This SOC includes safety and security features into this next generation of MCU so a deep understanding of these SoC challenges is required. Similar to many other SOCs, our Control ASIC includes the CPU as mentioned above, a large Analog Front End (AFE) consisting of references, clocks, multiple ADCs, DAC functions, and analog muxes for the needed measurements in the Inverter, a Power Line Communications Modem (PLC), our proprietary Power Production control block and a host of other peripherals.

This position is in our ASIC Engineering Team Reporting to the Senior Director of ASIC Engineering in Bangalore India.

Responsibilities

Working with our Internal/Contract verification resources, IP designers and the Full Chip RTL engineers you will verify the new SOC design. You will also have responsibility set the verification methodology and verify the RTL developed by Enphase engineers and 3rd party IP.

Requirements

Deep understanding and experience in SoC architecture and verification

Specific experience verifying the ARM CM4 and all the surrounding IP, like: AHB, AXI, RAM and ROM controllers, DMA controllers. As our new MCUs will include security features for the first time, experience with the ARM Protection units is preferred. As these Control ASICs from Enphase contain a large AFE, experience with verifying high speed and high accuracy analog systems with a mixed signal methodology is an added advantage.

Hands on experience with RISC-V verification will be an added advantage.

Hands-on experience with UVM using SystemVerilog, Coverage driven verification methods, formal verification methods for IP/SoC functional verification is highly preferred.

Knowledge of all the RTL verification methods, Gate level verifications, and mixed signal methodologies.

Experience and ability to bring complex SOCs into production

Credentials

Proven track record based on at least 15+ years of experience