IP Enablement Application Engineer

37 Minutes ago • 4 Years + • $153,540 PA - $216,770 PA

Job Summary

Job Description

Intel Foundry is seeking an IP Enablement Application Engineer to provide technical support to customers on IP integration issues. This role involves collaborating with internal and external teams, creating technical content, driving design kit quality, and resolving customer issues. The engineer will engage in all phases of IP development, from architecture to post-silicon validation, ensuring seamless integration of Intel IPs into customer SoCs.
Must have:
  • Collaborate with internal teams and external stakeholders on foundational IP integration issue resolution.
  • Create content, application notes, and deliver technical training/presentations.
  • Drive quality of design kits, documentation, and assist in tearing down barriers to successful customer design tape-outs.
  • Work independently with design team and customers to solve issues either remotely or onsite.
  • Work with cross-functional teams to develop SoC and IP Integration into SoC.
  • Engage with IP development team to ensure all IP collaterals are generated and provided.
  • Fully own assigned IPs and work with Internal and external customer and help them integrate Intel IPs to SoC and provide technical support.
  • Drive resolution of customer issues related to the IP collaterals generation, logic design verification, IP release, and integration in SoC environment.
  • Engage in the upfront identification and documentation of customer requirements.
  • Prepare customer training materials and provide training on IP architecture, specifications, and fuse/register settings.
  • Debugging and problem solving in a team environment.
  • US Citizenship required.
  • Ability to obtain and maintain a US Government Security Clearance.
  • Bachelor's degree in Electrical Engineering, Computer Science, or in a STEM related field of study.
  • 3+ years of experience with SOC IP integration.
  • 4+ years of experience in RTL design and DFT using Verilog/System Verilog.
  • 4+ years of experience with VCS, Verdi, Spyglass or equivalent tools.
  • Experience in ASIC or SoC development.
Good to have:
  • Active US Government Security Clearance with a minimum of Secret level.
  • Post Graduate degree in Electrical Engineering, Computer Science, or in a STEM related field of study.
  • Experience with one or more industry standard IO interfaces including ADPLL, GPIO, Digital Thermal Sensors, DDR, LPDDR, PCIE, USB, USB TypeC, Ethernet.
  • Hands on Experience with customer support in Memory Design, Memory Compiler Design, eFUSE and or antiFUSE.
  • Experience with IP integration and design flow challenges within the context of subsystems and SOCs.
  • Experience with IP development.
  • Experience in scripting languages like Perl, Tcl, and Python.
Perks:
  • Competitive pay
  • Stock
  • Bonuses
  • Health benefits
  • Retirement benefits
  • Vacation
  • Hybrid work model

Job Details

Job Description:

Intel Foundry is a systems foundry dedicated to transforming the global semiconductor industry by delivering cutting-edge silicon process and packaging technology leadership for the AI era. With a focus on scalability, AI advancement, and shaping the future, we provide an unparalleled blend of an industry-leading technology, a rich IP portfolio, a world-class design ecosystem, and an operationally resilient global manufacturing supply chain.

Intel Foundry will be differentiated from other foundries with a combination of leading-edge packaging and process technology, committed capacity in the US and Europe, and a world-class IP portfolio that customers can choose from, including x86 cores, graphics, media, display, AI, interconnect, fabric and other critical foundational IP's, along with Arm and RISC-V ecosystem IP's. Foundry Services will also provide access to silicon design services to help our customers seamlessly turn silicon into solutions, using industry standard design packages. Come join us and do something wonderful.

The Aerospace, Defense and Government (ADG) - SoC Design and IP Enablement Engineer provides technical support to Intel Foundry Services customers on IP integration issues:

  • Collaborate with internal teams across Intel and external stakeholders such as foundry customers' design teams, IP providers, and EDA vendors on foundational IP integration issue resolution.
  • Create content, application notes and deliver technical training/presentations.
  • Drive quality of design kits, documentation, and assist in tearing down barriers to successful customer design tape-outs.
  • Able to work independently with design team and customers to solve issues either remotely or onsite.

The ADG SoC and IP Enablement engineer will be a dynamic and versatile person who engage with both the IP design teams and internal/external customers in all phases of IP development (architecture, pre-silicon, post silicon execution, validation, and debug). It will embody customer obsession by quickly resolving customer issues and providing hands on debug on a wide range of technical issues spanning all design domains (logic design, timing, physical integration, emulation, documentation, and customer training).

Your specific responsibilities may include but are not limited to the following:

  • Work with cross-functional teams to develop SoC and IP Integration into SoC.
  • Engage with IP development team to ensure all IP collaterals are generated and provided.
  • Fully own assigned IPs and work with Internal and external customer and help them integrate Intel IPs to SoC and provide technical support.
  • Drive resolution of customer issues related to the IP collaterals generation, logic design verification, IP release, and integration in SoC environment. This may involve travel to customer sites.
  • Engage in the upfront identification and documentation of customer requirements, working with the IP design teams to disposition requests.
  • Prepare customer training materials and provide training on IP architecture, specifications, and fuse/register settings to enable effective debug.
  • Debugging, and problem solving in a team environment.

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