Principal DFT Engineer

9 Minutes ago • 10 Years + • $141,300 PA - $226,000 PA

Job Summary

Job Description

Broadcom's ASIC Product Division is seeking a Principal DFT Engineer in San Jose, California. The role involves leading DFT programs from chip-level DFT specification through implementation and verification to production release. Responsibilities include DFT architecture, test insertion, pattern generation, coverage improvement, and post-silicon debug. The engineer will collaborate with physical design and STA teams for timing closure and interact with external customers, focusing on meeting product test metrics and innovating new DFT solutions for advanced technologies.
Must have:
  • Understanding Broadcom & customer DFT feature requirements & DPPM goals & defining appropriate DFT specifications for the ASIC
  • Implementing DFT, including Scan, MBIST, TAP, LBIST, IO, SerDes and other I/P DFT integration
  • Working closely with STA and DI Engineers design closure for test
  • Generating, Verifying & Debugging Test vectors before tape release
  • Validating & Debugging Test vectors on ATE during the silicon bring up phase
  • Assisting with silicon failure analysis, diagnostics & yield improvement efforts
  • Interfacing with the customer, physical design and test engineering/manufacturing teams located globally
  • Working closely with I/P DFT engineers & other stakeholders
  • Debugging customer returned parts on the ATE
  • Innovating newer DFT solutions to solve testability problems in 7nm & beyond
  • Automating DFT & Test Vector Generation flows
  • Strong DFT background (such as IO and Analog DFT, ATPG and/or Scan, BIST, and others)
  • Scan Insertion and scan compression background (DFT Compiler, Mentor TestKompress, etc.)
  • Well-versed in ATPG vector generation, simulation, and debugging. (TetraMax, Fastscan)
  • Experience in Verilog coding, testbench generation & simulation
  • Memory BIST insertion and verification experience on embedded (SRAM, CAM, eDRAM, ROM)
  • Boundary scan Verification and test vector generation. Should have good knowledge in IEEE1149.1 and IEEE1149.6
  • Basic knowledge Test-STA and constraints
  • Strong background on IEE1687, IJTAG, ICL and PDL
  • The ability to work in a multi-disciplined, cross-department environment
  • Solid knowledge in analog and digital circuit design, and device physics fundamentals
  • Good understanding of Si processing, logical and physical synthesis, and transistor reliability principles
  • Excellent problem solving, debug , root cause analysis and communication skills
  • Bachelors in Electrical/Electronic/Computer Engineering and 12+ years of relevant industry experience or Masters Degree in Electrical/Electronic/Computer Engineering and 10+ years of relevant industry experience
  • Proficiency in TCL, PERL, RUBY, PYTHON, C++ or similar coding languages
Good to have:
  • Experience working on the ATE is a plus
  • Experience with Serdes, DDR, PCIE, ENET, CXL IOBIST verification and silicon debug is a plus
  • Experience working on Tessent SSN is a plus
Perks:
  • Discretionary annual bonus
  • Equity in accordance with equity plan documents and equity award agreements
  • Medical, dental and vision plans
  • 401(K) participation including company matching
  • Employee Stock Purchase Program (ESPP)
  • Employee Assistance Program (EAP)
  • Company paid holidays
  • Paid sick leave
  • Vacation time
  • Paid Family Leave and other leaves of absence (as per applicable laws)

Job Details

Job Description:

Principal DFT Engineer

Broadcom's ASIC Product Division is seeking candidates for a DFT position at our San Jose, California Development Center. The successful candidate will be responsible for leading DFT programs all the way from chip level DFT specification, through to implementation and verification culminating in successfully releasing products to production.

The candidate would be required to work on various phases of SoC DFT related activities for Broadcom APD (ASIC Products Division)’s designs – DFT Architecture, Test insertion and verification, Pattern generation, Coverage improvement, Post silicon debug and yield improvement to meet the product test metrics. It involves working with the Physical Design & STA team for DFT mode timing closure. The role could also involve direct interaction with external customers.

It is expected that you can code using TCL, PERL, RUBY, PYTHON, C++ or similar.

Responsibilities:

  • Understanding Broadcom & customer DFT feature requirements & DPPM goals & defining appropriate DFT specifications for the ASIC
  • Implementing DFT, including Scan, MBIST, TAP, LBIST, IO, SerDes and other I/P DFT integration
  • Working closely with STA and DI Engineers design closure for test
  • Generating, Verifying & Debugging Test vectors before tape release.
  • Validating & Debugging Test vectors on ATE during the silicon bring up phase
  • Assisting with silicon failure analysis, diagnostics & yield improvement efforts
  • Interfacing with the customer, physical design and test engineering/manufacturing teams located globally
  • Working closely with I/P DFT engineers & other stakeholders
  • Debugging customer returned parts on the ATE
  • Innovating newer DFT solutions to solve testability problems in 7nm & beyond
  • Automating DFT & Test Vector Generation flows

Skills/Experience:

  • Strong DFT background (such as IO and Analog DFT, ATPG and/or Scan, BIST, and others)
  • Scan Insertion and scan compression background (DFT Compiler, Mentor TestKompress, etc.)
  • Well-versed in ATPG vector generation, simulation, and debugging. (TetraMax, Fastscan)
  • Experience in Verilog coding, testbench generation & simulation
  • Memory BIST insertion and verification experience on embedded (SRAM, CAM, eDRAM, ROM)
  • Boundary scan Verification and test vector generation. Should have good knowledge in IEEE1149.1 and IEEE1149.6
  • Basic knowledge Test-STA and constraints
  • Strong background on IEE1687, IJTAG, ICL and PDL
  • The ability to work in a multi-disciplined, cross-department environment
  • Solid knowledge in analog and digital circuit design, and device physics fundamentals
  • Good understanding of Si processing, logical and physical synthesis, and transistor reliability principles
  • Excellent problem solving, debug , root cause analysis and communication skills
  • Experience working on the ATE is a plus
  • Experience with Serdes, DDR, PCIE, ENET, CXL IOBIST verification and silicon debug is a plus
  • Experience working on Tessent SSN is a plus

Education & Experience:

  • Bachelors in Electrical/Electronic/Computer Engineering and 12+ years of relevant industry experience or Masters Degree in Electrical/Electronic/Computer Engineering and 10+ years of relevant industry experience

Additional Job Description:

Compensation and Benefits

The annual base salary range for this position is $141,300 - $226,000

This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Similar Jobs

Looks like we're out of matches

Set up an alert and we'll send you similar jobs the moment they appear!

Similar Skill Jobs

Looks like we're out of matches

Set up an alert and we'll send you similar jobs the moment they appear!

Jobs in San Jose, California, United States

Looks like we're out of matches

Set up an alert and we'll send you similar jobs the moment they appear!

Similar Category Jobs

Looks like we're out of matches

Set up an alert and we'll send you similar jobs the moment they appear!

About The Company

A global infrastructure technology leader built on more than 60 years of innovation, collaboration and engineering excellence.

 

San Jose, California, United States (On-Site)

San Jose, California, United States (On-Site)

Colorado Springs, Colorado, United States (On-Site)

Colorado Springs, Colorado, United States (On-Site)

Colorado Springs, Colorado, United States (On-Site)

San Jose, California, United States (On-Site)

Colorado Springs, Colorado, United States (On-Site)

San Jose, California, United States (On-Site)

United Kingdom (Remote)

Bengaluru, Karnataka, India (On-Site)

View All Jobs

Get notified when new jobs are added by broadcom

Level Up Your Career in Game Development!

Transform Your Passion into Profession with Our Comprehensive Courses for Aspiring Game Developers.

Job Common Plug