RTL Design Verification

4 Months ago โ€ข 3-10 Years
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About the job

SummaryBy Outscal

Seeking an experienced RTL Design Verification Engineer with expertise in Verilog/SystemVerilog, UVM, and ASIC design flow. Proven ability in functional and performance verification, along with strong problem-solving skills. Experience with formal verification tools and methodologies is a plus.

About the job

๐‰๐จ๐ข๐ง ๐Ž๐ฎ๐ซ ๐“๐ž๐š๐ฆ ๐š๐ฌ ๐š๐ง ๐‘๐“๐‹ ๐ƒ๐ž๐ฌ๐ข๐ ๐ง ๐•๐ž๐ซ๐ข๐Ÿ๐ข๐œ๐š๐ญ๐ข๐จ๐ง ๐„๐ง๐ ๐ข๐ง๐ž๐ž๐ซ! at ARF Design

Are you passionate about RTL Design verification We're seeking a talented engineer to join our team and contribute to the semiconductor industry.

๐๐จ๐ฌ๐ข๐ญ๐ข๐จ๐ง: RTL Design verification Engineer

๐„๐ฑ๐ฉ๐ž๐ซ๐ข๐ž๐ง๐œ๐ž: 5-10 Years

๐‹๐จ๐œ๐š๐ญ๐ข๐จ๐ง: #Bangalore #Bhubaneswar #hyderabad

๐‘๐ž๐ฌ๐ฉ๐จ๐ง๐ฌ๐ข๐›๐ข๐ฅ๐ข๐ญ๐ข๐ž๐ฌ::

  • Develop and execute verification plans for complex RTL designs.
  • Perform functional and performance verification of design blocks.
  • Collaborate with cross-functional teams to ensure successful IP component integration.
  • Contribute to enhancing verification methodologies and best practices.

๐๐ฎ๐š๐ฅ๐ข๐Ÿ๐ข๐œ๐š๐ญ๐ข๐จ๐ง๐ฌ:

Bachelor's or master's degree in electrical engineering/Electronics & Communication Engineering or related field.

๐๐ซ๐ข๐ฆ๐š๐ซ๐ฒ ๐‘๐ž๐ช๐ฎ๐ข๐ซ๐ž๐ฆ๐ž๐ง๐ญ๐ฌ::

  • Minimum of 3+ years of experience in RTL design verification.
  • Proficiency in Verilog/ SystemVerilog and experience with industry-standard verification methodologies (OVM/UVM).
  • Strong understanding of ASIC design flow and verification techniques.
  • Excellent problem-solving and debugging skills.

๐’๐ž๐œ๐จ๐ง๐๐š๐ซ๐ฒ ๐‘๐ž๐ช๐ฎ๐ข๐ซ๐ž๐ฆ๐ž๐ง๐ญ๐ฌ:

  • Experience with formal verification tools and methodologies.
  • Familiarity with scripting languages (e.g., Python, Perl) for automation tasks.
  • Knowledge of industry-standard protocols and interfaces (e.g., PCIe, AXI, AHB).

๐๐ž๐ง๐ž๐Ÿ๐ข๐ญ๐ฌ:

  • Opportunities for professional growth and career advancement.
  • Vibrant and inclusive work culture that values collaboration and innovation.

๐‘๐ž๐š๐๐ฒ ๐ญ๐จ ๐‰๐จ๐ข๐ง ๐”๐ฌ?

If you're ready to take your career to the next level and contribute to groundbreaking projects, we want to hear from you!

๐๐ฅ๐ž๐š๐ฌ๐ž ๐ฌ๐ฎ๐›๐ฆ๐ข๐ญ ๐ฒ๐จ๐ฎ๐ซ ๐ซ๐ž๐ฌ๐ฎ๐ฆ๐ž/๐‚๐• ๐ญ๐จ poojakarve@arf-design.com

๐๐จ๐ญ๐ž: Please name the file in the following format: Your Full

๐๐š๐ฆ๐ž_ ๐ƒ๐ž๐ฌ๐ข๐ ๐ง๐š๐ญ๐ข๐จ๐ง_ ๐„๐ฑ๐ฉ๐ž๐ซ๐ข๐ž๐ง๐œ๐ž.

Skills: design,rtl design,design verification testing,.com,universal verification methodology (uvm),verilog,systemverilog

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