RTL /Processor Architecture Design (DSP)Staff

Job Posting Date

2025-09-10

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.

OR

• Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.

OR

• PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

This position is for RTL designer role in DSP processor team. The position involves in-depth understanding of the ASIC design flow from RTL to GDS2 and the challenges posed by advanced technologies. The successful candidate will possess detailed understanding of RTL design, synthesis, static timing analysis, formal verification, PLDRC, clock domain crossing, and low power techniques. Knowledge and experience of microprocessor integration is a definite advantage.

Skills/Experience

Must have 3 to 15 years of practical experience with details of RTL development (VHDL and/or Verilog) including:

• functional and structural RTL design, design partitioning,
• simulation and regression, collaboration with design verification team. Must have good familiarity with latest RTL languages and tools, including: simulation systems (e.g. Modelsim, VCS), synthesis tools (e.g. Design Compile), static timing tools (e.g. Prime Time), Linting tools, CDC tools, UPF, code coverage, System Verilog Assertion, etc.

Experience with the following area is highly desirable:

• Strong processor architecture knowledge
• Microarchitecture implementation
• Microprocessor integration
• Low power design

Responsibilities

• Develop RTL for multiple logic blocks of a DSP core
• Run various frontend tools to check for linting, clock domain crossing, synthesis, etc.
• Work with physical design team on design constrain and timing closure
• Work with power team on power optimization
• Work with verification team to collaborate on test plan, coverage plan, and coverage closure

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If you would like more information about this role, please contact Qualcomm Careers.

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