SOC Design Engineer- Sr Eng

2 Months ago • 8-11 Years

Software Development & Engineering

Job Description

This Senior SOC Design Engineer role at Qualcomm in Bangalore requires 8-11 years of experience in ASIC/SoC design. Key responsibilities include logic design, micro-architecture, RTL coding, and SoC integration for complex systems. Candidates must be proficient in Verilog/System-Verilog and have hands-on experience with low-power and multi-clock SoC designs, as well as asynchronous interfaces. The role involves working with ASIC development tools like Lint, CDC, Design compiler, and Primetime, and collaborating with verification and validation teams for pre/post-Silicon debug. A Bachelor's or Master's in Electrical Engineering is required.

Good To Have:

Knowledge of AMBA protocols (AXI, AHB, APB)
Knowledge of SoC clocking/reset/debug architecture and peripherals (USB, PCIE, SDCC)
Understanding of Memory controller designs and microprocessors
Understanding of constraint development and timing closure
Experience in Synthesis and understanding of timing concepts
Experience creating padring and working with the chip level floorplan team

Must Have:

8 to 11 years of work experience in ASIC/SoC Design
Logic design, micro-architecture, and RTL coding
SoC design and integration for complex SoCs
Proficiency in Verilog/System-Verilog
Hands-on experience in Low power SoC design
Hands-on experience in Multi Clock designs and Asynchronous interface
Experience using ASIC development tools such as Lint, CDC, Design compiler, and Primetime
Work closely with SoC verification and validation teams for pre/post Silicon debug

Perks:

Health: Qualcomm offers a world-class health benefit option providing world-class coverage to employees and their eligible dependents.
Wealth: Our programs are designed to help employees build and prepare for a financially secure future.
Self: Our self and family resources help you build emotional/mental strength and resilience, as well as define your purpose — in life and at work.
Wellbeing: Qualcomm’s wellbeing programs and resources offer support to help employees Live+Well and Work+Well, so they can unlock their full potential at home, at work, and everywhere between.

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Job Description

8 to 11 years of work experience in ASIC/SoC Design
Experience in Logic design /micro-architecture / RTL coding is a must.
Must have hands on experience with SoC design and integration for complex SoCs.
Experience in Verilog/System-Verilog is a must.
knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC.
Understanding of Memory controller designs and microprocessors is an added advantage
Work closely with the SoC verification and validation teams for pre/post Silicon debug
Hands on experience in Low power SoC design is required
Hands on experience in Multi Clock designs, Asynchronous interface is a must.
Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime is required.
Understanding of constraint development and timing closure is a plus.
Experience in Synthesis / Understanding of timing concepts is a plus.
Experience creating padring and working with the chip level floorplan team is an added advantage.
Excellent oral and written communications skills
Proactive, creative, curious, motivated to learn and contribute with good collaboration skills.

Required: Bachelor's, Electrical Engineering Preferred: Master's, Electrical Engineering.

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