Sr. Principal Engineer, Hardware Design

2 Months ago • 15 Years + • $240,000 PA - $317,200 PA
Software Development & Engineering

Job Description

As a Sr Principal Engineer, Hardware Design, you will develop the micro-architecture and design for SiMa.ai’s MLSoC™, focusing on high-speed serial interfaces like PCIe, Ethernet, and USB. Responsibilities include RTL coding, design reviews, synthesis, static timing analysis, and coverage analysis, collaborating closely with architecture, verification, and back-end teams. This role involves chip validation, bringup, and characterization for an SoC ASIC with a key machine learning component.
Good To Have:
  • Familiarity with UCIe interface
  • Familiarity with Chiplet architecture
Must Have:
  • Develop micro-architecture and design for SiMa.ai’s MLSoC™
  • Focus on high speed serial interfaces like PCIe, Ethernet and USB
  • Perform RTL coding, design and reviews, synthesis, static timing analysis, and coverage analysis
  • Work closely with architecture, verification, and back-end teams
  • Help with chip validation, bringup, and characterization
  • Experience in SOC design methodology, micro-architecture, emulation and back-end development, and chip bringup
  • Hands-on experience with specification, design, integration and silicon bringup of high speed interfaces like PCIe, Ethernet and USB
  • Good understanding of PCIe, Ethernet and USB protocols

Add these skills to join the top 1% applicants for this job

cross-functional
communication
team-player
game-texts
back-end
machine-learning

Description

As a Sr Principal Engineer, Hardware Design engineer, you will help develop the micro-architecture and design for SiMa.ai’s MLSoC™, with special focus on high speed serial interfaces like PCIe, Ethernet and USB. Your responsibilities will include RTL coding, design and reviews, synthesis, static timing analysis, and coverage analysis. This means working very closely with the architecture team, verification team, and back-end team as well as cross-functional teams. The primary design target is an SoC ASIC, with machine learning being a key component.

Areas of Focus

  • Design methodology, micro-architecture, RTL.
  • Static timing analysis, verification/emulation support, back-end support, chip bringup.
  • Work with the architecture team to develop the uArch and subsequently write the RTL.
  • Synthesis, static timing analysis, equivalence checking.
  • Work with the back-end team on floor planning and other PD-related activities.
  • Work with the verification and emulation teams.
  • Help with chip validation, bringup, and characterization.

Key Requirements

  • Master’s degree in electrical engineering, computer engineering, or a related field.
  • 15+ years professional experience as a hardware design engineer, SOC design engineer, hardware engineer, or related position.
  • Experience must include SOC design methodology, micro-architecture, emulation and back-end development, and chip bringup.
  • Experience must include hands on specification, design, integration and silicon bringup of high speed interfaces like PCIe, Ethernet and USB
  • Good understanding of the PCIe, Ethernet and USB protocols are highly desired.
  • Familiarity of UCIe interface and Chiplet architecture is a plus.

Personal attributes

Can-do attitude. Strong team player. Curious, creative and good at solving problems. Execution and results-oriented. Self-driven, Thinks Big and is highly accountable. Good communication skills.

The annual salary for this position ranges from $240,000 - $317,200. The actual annual salary paid for this position will be based on several factors, including but not limited to, skills, prior experiences, qualifications, expertise, work location, total target compensation, training, company needs, and current market demands. The annual salary range for this position is subject to change and may be adjusted in the future.

EEO Employer: SiMa is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

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