Staff Engineer, Digital IC Design
Job Description
- Familiar with System-Verilog and UVM verification methodology.
- Familiar with script languages (perl, tcl etc.).
- Familiar with STA timing flow.
- Write RTL code for Low power and multi-clock domain designs.
- Perform synthesis and pre- and post-layout timing closure.
- Run the whole front-end design flow such as Synthesis, power analysis, and normal check etc.
- Contribute test specifications and support evaluation of the design in coordination with application and product engineering.
- Provide design documentation, descriptions and information to application engineers, field application engineers, products engineers, and customers.
- Major in EE, CS or related, Master Degree with 2+ years or Bachelor with 4+ years working experiences in ASIC design.
- Familiar with Verilog and RTL design.
- Good problem solving and communication skills.
- Good written and spoken English. Be able to work together with global team.
- Competitive compensation and great benefits.
- Workstyle within an environment of shared collaboration, transparency, and inclusivity.
- Tools and resources to succeed in doing work that matters, and to grow and develop with us.
Your Team, Your Impact
Marvell is a leading provider of innovative storage technologies, including ultra-fast read channels and high-performance processors. These solutions address all segments of the hard disk drive (HDD) and solid-state drive (SSD) electronics markets. You will be part of the team working on Preamplifier and providing full custom integrated circuit solution for magnetic hard disk drives development.
What You Can Expect
- Write RTL code for Low power and multi-clock domain designs.
- Perform synthesis and pre- and post-layout timing closure.
- Run the whole front-end design flow such as Synthesis, power analysis, and normal check etc.
- Contribute test specifications and support evaluation of the design in coordination with application and product engineering.
- Provide design documentation, descriptions and information to application engineers, field application engineers, products engineers, and customers.
What We're Looking For
- Major in EE, CS or related, Master Degree with 2+ years or Bachelor with 4+ years working experiences in ASIC design.
- Familiar with Verilog and RTL design
- Good problem solving and communication skills
- Good written and spoken English. Be able to work together with global team.
- Familiar with System-Verilog and UVM verification methodology is a plus
- Familiar with script languages (perl, tcl etc.) is a plus
- Familiar with STA timing flow is a plus
Additional Compensation and Benefit Elements
With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
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