As part of the WTE pre-silicon team, you will collaborate with SOC, SE, and software partners to create a virtual platform for next-generation cellular and connectivity teams. The role involves modeling new IPs of cellular SOCs and integrating subsystems. You will be responsible for developing new simulation models by reading HW specifications and using register description files. The work also includes the integration of hybrid simulation to create a complete SOC. You will be involved in integrating cycle-accurate CPU models for architecture exploration. You will collaborate with SW, SOC, and SE teams to understand new hardware changes and translate them into simulation requirements. Additionally, you will take on a pre-silicon architect role to define a pre-silicon strategy for simulation and FPGA platforms.