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ASIC Design Engineer, Core IP

California, United States (On-site)

ASIC Design Engineer, Core IP

2 Months ago • 5 Years + • Research & Development • $150,000 PA - $223,000 PA

About the job

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innovation

Job Description

As an ASIC Design Engineer, Core IP, you'll be a part of a diverse team developing custom silicon solutions that power Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. You will be responsible for using simulation/emulation/power analysis tools to ensure power and performance meet defined specifications. You will also be responsible for developing, implementing, and maintaining design blocks or components of a hardware product, and integrating design blocks or components to create product subsystems. You will also work with Verification and Silicon Validation teams to ensure the functionality of the design. This role involves providing input on synthesis, timing closure, and Physical Design of digital blocks. In addition, you will take a leadership role on technical project teams and set technical direction.

Must have:

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
5 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog.
Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low-power design techniques.

Good to have:

Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science.
Experience working with architecture, design, and implementation of digital logic using Chisel.
Knowledge of accelerators (e.g., Machine Learning or GPUs) or similar high performance designs.

Minimum qualifications:

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
5 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog.
Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low-power design techniques.

Preferred qualifications:

Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science.
Experience working with architecture, design, and implementation of digital logic using Chisel.
Knowledge of accelerators (e.g., Machine Learning or GPUs) or similar high performance designs.

About the job

Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

The US base salary range for this full-time position is $150,000-$223,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target salaries for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about .

Responsibilities

Use simulation/emulation/power analysis tools and techniques to ensure power and performance meet defined specifications.
Develop, implement, and maintain design blocks or components/part of a hardware product, and integrate design blocks or components/parts to create product subsystems.
Engage with Verification and Silicon Validation teams to ensure functionality of the design.
Provide input on synthesis, timing closure, and Physical Design of digital blocks.
Take a leadership role on technical project teams and set technical direction.

View Full Job Description

$150.0K - $223.0K/yr (Outscal est.)

$186.5K/yr avg.

Mountain View, California, United States

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About The Company

Google

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A problem isn't truly solved until it's solved for all. Googlers build products that help create opportunities for everyone, whether down the street or across the globe. Bring your insight, imagination and a healthy disregard for the impossible. Bring everything that makes you unique. Together, we can build for everyone.